BLE_DCF_TYQ_CH592F/StdPeriphDriver/CH58x_pwr.c

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/********************************** (C) COPYRIGHT *******************************
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* File Name : CH58x_pwr.c
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* Author : WCH
* Version : V1.2
* Date : 2021/11/17
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* Description : source file(ch585/ch584)
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*********************************************************************************
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* Attention: This software (modified or not) and binary are used for
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
*******************************************************************************/
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#include "CH58x_common.h"
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/*********************************************************************
* @fn PWR_DCDCCfg
*
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD>DC/DC<EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڽ<EFBFBD>Լϵͳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @param s - <EFBFBD>Ƿ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DCDC<EFBFBD><EFBFBD>Դ
*
* @return none
*/
void PWR_DCDCCfg(FunctionalState s)
{
uint16_t adj = R16_AUX_POWER_ADJ;
uint16_t plan = R16_POWER_PLAN;
if(s == DISABLE)
{
adj &= ~RB_DCDC_CHARGE;
plan &= ~(RB_PWR_DCDC_EN | RB_PWR_DCDC_PRE); // <20><>· DC/DC
sys_safe_access_enable();
R16_AUX_POWER_ADJ = adj;
R16_POWER_PLAN = plan;
sys_safe_access_disable();
}
else
{
uint32_t HW_Data[2];
FLASH_EEPROM_CMD(CMD_GET_ROM_INFO, ROM_CFG_ADR_HW, HW_Data, 0);
if((HW_Data[0]) & (1 << 13))
{
return;
}
adj |= RB_DCDC_CHARGE;
plan |= RB_PWR_DCDC_PRE;
sys_safe_access_enable();
R16_AUX_POWER_ADJ = adj;
R16_POWER_PLAN = plan;
sys_safe_access_disable();
DelayUs(10);
sys_safe_access_enable();
R16_POWER_PLAN |= RB_PWR_DCDC_EN;
sys_safe_access_disable();
}
}
/*********************************************************************
* @fn PWR_UnitModCfg
*
* @brief <EFBFBD>ɿص<EFBFBD>Ԫģ<EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @param s - <EFBFBD>Ƿ<EFBFBD><EFBFBD>򿪵<EFBFBD>Դ
* @param unit - please refer to unit of controllable power supply
*
* @return none
*/
void PWR_UnitModCfg(FunctionalState s, uint8_t unit)
{
uint8_t ck32k_cfg = R8_CK32K_CONFIG;
if(s == DISABLE) //<2F>ر<EFBFBD>
{
ck32k_cfg &= ~(unit & 0x03);
}
else //<2F><><EFBFBD><EFBFBD>
{
ck32k_cfg |= (unit & 0x03);
}
sys_safe_access_enable();
R8_CK32K_CONFIG = ck32k_cfg;
sys_safe_access_disable();
}
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/*********************************************************************
* @fn PWR_SafeClkCfg
*
* @brief <EFBFBD><EFBFBD>ȫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>ӿ<EFBFBD><EFBFBD><EFBFBD>λ
*
* @param s - <EFBFBD>Ƿ<EFBFBD><EFBFBD>򿪶<EFBFBD>Ӧ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>
* @param perph - please refer to SAFE CLK control bit define
*
* @return none
*/
void PWR_SafeClkCfg(FunctionalState s, uint16_t perph)
{
uint32_t sleep_ctrl = R8_SAFE_CLK_CTRL;
if(s == DISABLE)
{
sleep_ctrl |= perph;
}
else
{
sleep_ctrl &= ~perph;
}
sys_safe_access_enable();
R8_SAFE_CLK_CTRL = sleep_ctrl;
sys_safe_access_disable();
}
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/*********************************************************************
* @fn PWR_PeriphClkCfg
*
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>ӿ<EFBFBD><EFBFBD><EFBFBD>λ
*
* @param s - <EFBFBD>Ƿ<EFBFBD><EFBFBD>򿪶<EFBFBD>Ӧ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>
* @param perph - please refer to Peripher CLK control bit define
*
* @return none
*/
void PWR_PeriphClkCfg(FunctionalState s, uint16_t perph)
{
uint32_t sleep_ctrl = R32_SLEEP_CONTROL;
if(s == DISABLE)
{
sleep_ctrl |= perph;
}
else
{
sleep_ctrl &= ~perph;
}
sys_safe_access_enable();
R32_SLEEP_CONTROL = sleep_ctrl;
sys_safe_access_disable();
}
/*********************************************************************
* @fn PWR_PeriphWakeUpCfg
*
* @brief ˯<EFBFBD>߻<EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @param s - <EFBFBD>Ƿ<EFBFBD><EFBFBD>򿪴<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD>߻<EFBFBD><EFBFBD>ѹ<EFBFBD><EFBFBD><EFBFBD>
* @param perph - <EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD>õĻ<EFBFBD><EFBFBD><EFBFBD>Դ
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* RB_SLP_USB_WAKE - USBFS Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ
* RB_SLP_USB2_WAKE - USBHS Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ
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* RB_SLP_RTC_WAKE - RTC Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ
* RB_SLP_GPIO_WAKE - GPIO Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ
* RB_SLP_BAT_WAKE - BAT Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ
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* RB_GPIO_EDGE_WAKE - GPIO<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ػ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><EFBFBD>ܻ<EFBFBD><EFBFBD><EFBFBD>
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* @param mode - refer to WakeUP_ModeypeDef
*
* @return none
*/
void PWR_PeriphWakeUpCfg(FunctionalState s, uint8_t perph, WakeUP_ModeypeDef mode)
{
uint8_t m;
if(s == DISABLE)
{
sys_safe_access_enable();
R8_SLP_WAKE_CTRL &= ~perph;
sys_safe_access_disable();
}
else
{
switch(mode)
{
case Short_Delay:
m = 0x01;
break;
case Long_Delay:
m = 0x00;
break;
default:
m = 0x01;
break;
}
sys_safe_access_enable();
R8_SLP_WAKE_CTRL |= RB_WAKE_EV_MODE | perph;
sys_safe_access_disable();
sys_safe_access_enable();
R8_SLP_POWER_CTRL &= ~(RB_WAKE_DLY_MOD);
sys_safe_access_disable();
sys_safe_access_enable();
R8_SLP_POWER_CTRL |= m;
sys_safe_access_disable();
}
}
/*********************************************************************
* @fn PowerMonitor
*
* @brief <EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @param s - <EFBFBD>Ƿ<EFBFBD><EFBFBD>򿪴˹<EFBFBD><EFBFBD><EFBFBD>
* @param vl - refer to VolM_LevelypeDef
*
* @return none
*/
void PowerMonitor(FunctionalState s, VolM_LevelypeDef vl)
{
uint8_t ctrl = R8_BAT_DET_CTRL;
uint8_t cfg = R8_BAT_DET_CFG;
if(s == DISABLE)
{
sys_safe_access_enable();
R8_BAT_DET_CTRL = 0;
sys_safe_access_disable();
}
else
{
if(vl & 0x80)
{
cfg = vl & 0x03;
ctrl = RB_BAT_MON_EN | ((vl >> 2) & 1);
}
else
{
cfg = vl & 0x03;
ctrl = RB_BAT_DET_EN;
}
sys_safe_access_enable();
R8_BAT_DET_CTRL = ctrl;
R8_BAT_DET_CFG = cfg;
sys_safe_access_disable();
mDelayuS(1);
sys_safe_access_enable();
R8_BAT_DET_CTRL |= RB_BAT_LOW_IE | RB_BAT_LOWER_IE;
sys_safe_access_disable();
}
}
/*********************************************************************
* @fn LowPower_Idle
*
* @brief <EFBFBD>͹<EFBFBD><EFBFBD><EFBFBD>-Idleģʽ
*
* @param none
*
* @return none
*/
__HIGH_CODE
void LowPower_Idle(void)
{
FLASH_ROM_SW_RESET();
R8_FLASH_CTRL = 0x04; //flash<73>ر<EFBFBD>
PFIC->SCTLR &= ~(1 << 2); // sleep
__WFI();
__nop();
__nop();
}
/*********************************************************************
* @fn LowPower_Halt
*
* @brief <EFBFBD>͹<EFBFBD><EFBFBD><EFBFBD>-Haltģʽ<EFBFBD><EFBFBD><EFBFBD>˵͹<EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD>HSI/5ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѻ<EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>û<EFBFBD><EFBFBD>Լ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD>ϵͳʱ<EFBFBD><EFBFBD>Դ
*
* @param none
*
* @return none
*/
__HIGH_CODE
void LowPower_Halt(void)
{
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uint32_t i;
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uint8_t x32Mpw;
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uint16_t clk_sys_cfg;
uint8_t flash_cfg,flash_sck;
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clk_sys_cfg = R16_CLK_SYS_CFG;
flash_cfg = R8_FLASH_CFG;
flash_sck = R8_FLASH_SCK;
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FLASH_ROM_SW_RESET();
R8_FLASH_CTRL = 0x04; //flash<73>ر<EFBFBD>
x32Mpw = R8_XT32M_TUNE;
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if(!(R8_HFCK_PWR_CTRL&RB_CLK_XT32M_KEEP))
{
x32Mpw = (x32Mpw & 0xfc) | 0x03; // 150%<25><EFBFBD><EEB6A8><EFBFBD><EFBFBD>
}
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sys_safe_access_enable();
R8_BAT_DET_CTRL = 0; // <20>رյ<D8B1>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD>
sys_safe_access_disable();
sys_safe_access_enable();
R8_XT32M_TUNE = x32Mpw;
sys_safe_access_disable();
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// sys_safe_access_enable();
// R8_PLL_CONFIG |= (1 << 5);
// sys_safe_access_disable();
if(R16_CLK_SYS_CFG & RB_OSC32M_SEL) //ʹ<><CAB9><EFBFBD>ⲿ32M
{
sys_safe_access_enable();
R8_SLP_POWER_CTRL |= 0x40;
R8_FLASH_CFG = 0X57;
R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4));
R16_CLK_SYS_CFG = CLK_SOURCE_HSE_8MHz;
sys_safe_access_disable();
}
else//ʹ<><CAB9><EFBFBD>ڲ<EFBFBD>16M
{
sys_safe_access_enable();
R8_FLASH_CFG = 0X57;
R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4));
R16_CLK_SYS_CFG = CLK_SOURCE_HSI_4MHz;
sys_safe_access_disable();
}
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PFIC->SCTLR |= (1 << 2); //deep sleep
__WFI();
__nop();
__nop();
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if((!(clk_sys_cfg & RB_OSC32M_SEL)) && (clk_sys_cfg & 0x100)) //ʹ<><CAB9><EFBFBD>ڲ<EFBFBD>16M
{
i = 40;
do
{
__nop();
}while(--i);
}
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sys_safe_access_enable();
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R8_FLASH_CFG = flash_cfg;
R8_FLASH_SCK = flash_sck;
R16_CLK_SYS_CFG = clk_sys_cfg;
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sys_safe_access_disable();
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// sys_safe_access_enable();
// R8_PLL_CONFIG &= ~(1 << 5);
// sys_safe_access_disable();
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}
/*******************************************************************************
* Function Name : LowPower_Sleep
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* Description : <EFBFBD>͹<EFBFBD><EFBFBD><EFBFBD>-Sleepģʽ<EFBFBD><EFBFBD>ע<EFBFBD><EFBFBD>Ѻ<EFBFBD><EFBFBD><EFBFBD>flash<EFBFBD>ȶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ300us
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* Input : rm:
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RB_PWR_RAM32K - 32K retention SRAM <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
RB_PWR_RAM96K - 96K main SRAM <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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RB_PWR_EXTEND - USB <EFBFBD><EFBFBD> BLE <EFBFBD><EFBFBD>Ԫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>򹩵<EFBFBD>
RB_PWR_XROM - FlashROM <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
NULL - <EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD>Ԫ<EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD>
* Return : None
*******************************************************************************/
__HIGH_CODE
void LowPower_Sleep(uint16_t rm)
{
uint8_t x32Mpw;
uint16_t power_plan;
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uint16_t clk_sys_cfg;
uint16_t hfck_pwr_ctrl;
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uint8_t flash_cfg,flash_sck;
uint32_t i;
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clk_sys_cfg = R16_CLK_SYS_CFG;
hfck_pwr_ctrl = R8_HFCK_PWR_CTRL;
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x32Mpw = R8_XT32M_TUNE;
x32Mpw = (x32Mpw & 0xfc) | 0x03; // 150%<25><EFBFBD><EEB6A8><EFBFBD><EFBFBD>
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flash_cfg = R8_FLASH_CFG;
flash_sck = R8_FLASH_SCK;
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sys_safe_access_enable();
R8_BAT_DET_CTRL = 0; // <20>رյ<D8B1>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD>
sys_safe_access_disable();
sys_safe_access_enable();
R8_XT32M_TUNE = x32Mpw;
sys_safe_access_disable();
PFIC->SCTLR |= (1 << 2); //deep sleep
power_plan = R16_POWER_PLAN & (RB_PWR_DCDC_EN | RB_PWR_DCDC_PRE);
power_plan |= RB_PWR_PLAN_EN | RB_PWR_CORE | rm | (2<<11);
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power_plan &= ~RB_XT_PRE_EN;
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sys_safe_access_enable();
R16_POWER_PLAN = power_plan;
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R8_HFCK_PWR_CTRL |= RB_CLK_RC16M_PON; //˯<><CBAF><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD>HSI
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sys_safe_access_disable();
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if(R16_CLK_SYS_CFG & RB_OSC32M_SEL) //ʹ<><CAB9><EFBFBD>ⲿ32M
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{
sys_safe_access_enable();
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if(rm & RB_XT_PRE_EN)
{
R8_SLP_POWER_CTRL |= 0x40;
}
else
{
R8_SLP_POWER_CTRL |= 0x41;
}
R8_FLASH_CFG = 0X57;
R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4));
R16_CLK_SYS_CFG = CLK_SOURCE_HSE_4MHz;
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sys_safe_access_disable();
}
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else//ʹ<><CAB9><EFBFBD>ڲ<EFBFBD>16M
{
sys_safe_access_enable();
R8_FLASH_CFG = 0X57;
R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4));
R16_CLK_SYS_CFG = CLK_SOURCE_HSI_4MHz;
sys_safe_access_disable();
}
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__WFI();
__nop();
__nop();
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if(rm & RB_PWR_EXTEND)
{
R32_U2H_BC_CTRL = 0;
(*((PUINT32V)0x4000C254)) = 0;
}
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if((!(clk_sys_cfg & RB_OSC32M_SEL)) && (clk_sys_cfg & 0x100)) //ʹ<><CAB9><EFBFBD>ڲ<EFBFBD>16M
{
i = 40;
do
{
__nop();
}while(--i);
}
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sys_safe_access_enable();
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R8_FLASH_CFG = flash_cfg;
R8_FLASH_SCK = flash_sck;
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R16_CLK_SYS_CFG = clk_sys_cfg;
R8_HFCK_PWR_CTRL = hfck_pwr_ctrl;
sys_safe_access_disable();
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sys_safe_access_enable();
R16_POWER_PLAN &= ~RB_PWR_PLAN_EN;
sys_safe_access_disable();
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// DelayUs(100); //<2F><><EFBFBD><EFBFBD>rm & RB_XT_PRE_EN == 0, <20><><EFBFBD>˳<EFBFBD><CBB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>flash<73><68><EFBFBD><EFBFBD><EBA3AC><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>ʱ100us<75><73><EFBFBD>˳<EFBFBD>
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}
/*********************************************************************
* @fn LowPower_Shutdown
*
* @brief <EFBFBD>͹<EFBFBD><EFBFBD><EFBFBD>-Shutdownģʽ<EFBFBD><EFBFBD><EFBFBD>˵͹<EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD>HSI/5ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѻ<EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>û<EFBFBD><EFBFBD>Լ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD>ϵͳʱ<EFBFBD><EFBFBD>Դ
* @note ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ô˺<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DCDC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD>ƹرգ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֶ<EFBFBD><EFBFBD>ٴδ<EFBFBD><EFBFBD><EFBFBD>
*
* @param rm - <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD>
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* RB_PWR_RAM32K - 32K retention SRAM <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* RB_PWR_RAM96K - 96K main SRAM <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* RB_PWR_EXTEND - USB <EFBFBD><EFBFBD> BLE <EFBFBD><EFBFBD>Ԫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>򹩵<EFBFBD>
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* NULL - <EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD>Ԫ<EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD>
*
* @return none
*/
__HIGH_CODE
void LowPower_Shutdown(uint16_t rm)
{
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uint8_t x32Kpw;
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FLASH_ROM_SW_RESET();
x32Kpw = R8_XT32K_TUNE;
x32Kpw = (x32Kpw & 0xfc) | 0x01; // LSE<53><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD><CDB5><EFBFBD><EEB6A8><EFBFBD><EFBFBD>
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SetSysClock(CLK_SOURCE_HSI_PLL_13MHz);
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sys_safe_access_enable();
R8_BAT_DET_CTRL = 0; // <20>رյ<D8B1>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD>
sys_safe_access_disable();
sys_safe_access_enable();
R8_XT32K_TUNE = x32Kpw;
sys_safe_access_disable();
PFIC->SCTLR |= (1 << 2); //deep sleep
sys_safe_access_enable();
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R8_SLP_POWER_CTRL |= 0x40;
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sys_safe_access_disable();
sys_safe_access_enable();
R16_POWER_PLAN = RB_PWR_PLAN_EN | rm;
sys_safe_access_disable();
__WFI();
__nop();
__nop();
FLASH_ROM_SW_RESET();
sys_safe_access_enable();
R8_RST_WDOG_CTRL |= RB_SOFTWARE_RESET;
sys_safe_access_disable();
}