2024-12-02 16:26:55 +08:00
|
|
|
|
/********************************** (C) COPYRIGHT *******************************
|
2025-02-21 14:38:41 +08:00
|
|
|
|
* File Name : CH58x_SPI.h
|
2024-12-02 16:26:55 +08:00
|
|
|
|
* Author : WCH
|
|
|
|
|
* Version : V1.2
|
|
|
|
|
* Date : 2021/11/17
|
2025-02-21 14:38:41 +08:00
|
|
|
|
* Description : head file(ch585/ch584)
|
2024-12-02 16:26:55 +08:00
|
|
|
|
*********************************************************************************
|
|
|
|
|
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
|
|
|
|
* Attention: This software (modified or not) and binary are used for
|
|
|
|
|
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
|
|
|
|
*******************************************************************************/
|
|
|
|
|
|
2025-02-21 14:38:41 +08:00
|
|
|
|
#ifndef __CH58x_SPI_H__
|
|
|
|
|
#define __CH58x_SPI_H__
|
2024-12-02 16:26:55 +08:00
|
|
|
|
|
|
|
|
|
#ifdef __cplusplus
|
|
|
|
|
extern "C" {
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief SPI0 interrupt bit define
|
|
|
|
|
*/
|
|
|
|
|
#define SPI0_IT_FST_BYTE RB_SPI_IE_FST_BYTE // <20>ӻ<EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3>£<EFBFBD><C2A3><EFBFBD><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ֽ<EFBFBD><D6BD>ж<EFBFBD>
|
|
|
|
|
#define SPI0_IT_FIFO_OV RB_SPI_IE_FIFO_OV // FIFO <20><><EFBFBD><EFBFBD>
|
|
|
|
|
#define SPI0_IT_DMA_END RB_SPI_IE_DMA_END // DMA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
#define SPI0_IT_FIFO_HF RB_SPI_IE_FIFO_HF // FIFO ʹ<>ù<EFBFBD><C3B9><EFBFBD>
|
|
|
|
|
#define SPI0_IT_BYTE_END RB_SPI_IE_BYTE_END // <20><><EFBFBD>ֽڴ<D6BD><DAB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
#define SPI0_IT_CNT_END RB_SPI_IE_CNT_END // ȫ<><C8AB><EFBFBD>ֽڴ<D6BD><DAB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief Configuration data mode
|
|
|
|
|
*/
|
|
|
|
|
typedef enum
|
|
|
|
|
{
|
|
|
|
|
Mode0_LowBitINFront = 0, // ģʽ0<CABD><30><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>ǰ
|
|
|
|
|
Mode0_HighBitINFront, // ģʽ0<CABD><30><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>ǰ
|
|
|
|
|
Mode3_LowBitINFront, // ģʽ3<CABD><33><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>ǰ
|
|
|
|
|
Mode3_HighBitINFront, // ģʽ3<CABD><33><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>ǰ
|
|
|
|
|
} ModeBitOrderTypeDef;
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief Configuration SPI0 slave mode
|
|
|
|
|
*/
|
|
|
|
|
typedef enum
|
|
|
|
|
{
|
|
|
|
|
Mode_DataStream = 0, // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
|
|
|
|
Mose_FirstCmd, // <20><><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
|
|
|
|
} Slave_ModeTypeDef;
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽĬ<EFBFBD>ϳ<EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ0+3<EFBFBD><EFBFBD>ȫ˫<EFBFBD><EFBFBD>+8MHz
|
|
|
|
|
*/
|
|
|
|
|
void SPI0_MasterDefInit(void);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief SPI0 <EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD>= d*Tsys
|
|
|
|
|
*
|
|
|
|
|
* @param c - ʱ<EFBFBD>ӷ<EFBFBD>Ƶϵ<EFBFBD><EFBFBD>
|
|
|
|
|
*/
|
|
|
|
|
void SPI0_CLKCfg(uint8_t c);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
|
|
|
|
*
|
|
|
|
|
* @param m - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ refer to ModeBitOrderTypeDef
|
|
|
|
|
*/
|
|
|
|
|
void SPI0_DataMode(ModeBitOrderTypeDef m);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD><EFBFBD>ֽ<EFBFBD> (buffer)
|
|
|
|
|
*
|
|
|
|
|
* @param d - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
|
|
|
|
|
*/
|
|
|
|
|
void SPI0_MasterSendByte(uint8_t d);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><EFBFBD>ֽ<EFBFBD> (buffer)
|
|
|
|
|
*
|
|
|
|
|
* @param none
|
|
|
|
|
*/
|
|
|
|
|
uint8_t SPI0_MasterRecvByte(void);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief ʹ<EFBFBD><EFBFBD>FIFO<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><EFBFBD>ֽ<EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @param pbuf - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
|
|
|
|
* @param len - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4095
|
|
|
|
|
*/
|
|
|
|
|
void SPI0_MasterTrans(uint8_t *pbuf, uint16_t len);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief ʹ<EFBFBD><EFBFBD>FIFO<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ն<EFBFBD><EFBFBD>ֽ<EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @param pbuf - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
|
|
|
|
* @param len - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4095
|
|
|
|
|
*/
|
|
|
|
|
void SPI0_MasterRecv(uint8_t *pbuf, uint16_t len);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief DMA<EFBFBD><EFBFBD>ʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @param pbuf - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ,<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD>ֽڶ<EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
* @param len - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*/
|
|
|
|
|
void SPI0_MasterDMATrans(uint8_t *pbuf, uint16_t len);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief DMA<EFBFBD><EFBFBD>ʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @param pbuf - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ,<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD>ֽڶ<EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
* @param len - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*/
|
|
|
|
|
void SPI0_MasterDMARecv(uint8_t *pbuf, uint16_t len);
|
|
|
|
|
|
2025-02-21 14:38:41 +08:00
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽĬ<EFBFBD>ϳ<EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ0+3<EFBFBD><EFBFBD>ȫ˫<EFBFBD><EFBFBD>+8MHz
|
|
|
|
|
*/
|
|
|
|
|
void SPI1_MasterDefInit(void);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief SPI1 <EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD>= d*Tsys
|
|
|
|
|
*
|
|
|
|
|
* @param c - ʱ<EFBFBD>ӷ<EFBFBD>Ƶϵ<EFBFBD><EFBFBD>
|
|
|
|
|
*/
|
2025-03-27 10:22:43 +08:00
|
|
|
|
void SPI1_CLKCfg(uint8_t c);
|
2025-02-21 14:38:41 +08:00
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
|
|
|
|
*
|
|
|
|
|
* @param m - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ refer to ModeBitOrderTypeDef
|
|
|
|
|
*/
|
|
|
|
|
void SPI1_DataMode(ModeBitOrderTypeDef m);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD><EFBFBD>ֽ<EFBFBD> (buffer)
|
|
|
|
|
*
|
|
|
|
|
* @param d - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
|
|
|
|
|
*/
|
2025-03-27 10:22:43 +08:00
|
|
|
|
void SPI1_MasterSendByte(uint8_t d);
|
2024-12-02 16:26:55 +08:00
|
|
|
|
|
2025-02-21 14:38:41 +08:00
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><EFBFBD>ֽ<EFBFBD> (buffer)
|
|
|
|
|
*
|
|
|
|
|
* @param none
|
|
|
|
|
*/
|
2025-03-27 10:22:43 +08:00
|
|
|
|
uint8_t SPI1_MasterRecvByte(void);
|
2024-12-02 16:26:55 +08:00
|
|
|
|
|
2025-02-21 14:38:41 +08:00
|
|
|
|
/**
|
|
|
|
|
* @brief ʹ<EFBFBD><EFBFBD>FIFO<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><EFBFBD>ֽ<EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @param pbuf - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
|
|
|
|
* @param len - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4095
|
|
|
|
|
*/
|
2025-03-27 10:22:43 +08:00
|
|
|
|
void SPI1_MasterTrans(uint8_t *pbuf, uint16_t len);
|
2025-02-21 14:38:41 +08:00
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief ʹ<EFBFBD><EFBFBD>FIFO<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ն<EFBFBD><EFBFBD>ֽ<EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @param pbuf - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
|
|
|
|
* @param len - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4095
|
|
|
|
|
*/
|
2025-03-27 10:22:43 +08:00
|
|
|
|
void SPI1_MasterRecv(uint8_t *pbuf, uint16_t len);
|
2024-12-02 16:26:55 +08:00
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD>豸ģʽĬ<EFBFBD>ϳ<EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MISO<EFBFBD><EFBFBD>GPIO<EFBFBD><EFBFBD>ӦΪ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
|
|
|
|
*/
|
|
|
|
|
void SPI0_SlaveInit(void);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @param d - <EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*/
|
|
|
|
|
#define SetFirstData(d) (R8_SPI0_SLAVE_PRE = d)
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD>ӻ<EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD>ֽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @param d - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*/
|
|
|
|
|
void SPI0_SlaveSendByte(uint8_t d);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD>ӻ<EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD>ֽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @return <EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*/
|
|
|
|
|
uint8_t SPI0_SlaveRecvByte(void);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD>ӻ<EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><EFBFBD>ֽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @param pbuf - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
|
|
|
|
* @param len - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>ȣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4095
|
|
|
|
|
*/
|
|
|
|
|
void SPI0_SlaveTrans(uint8_t *pbuf, uint16_t len);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD>ӻ<EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ն<EFBFBD><EFBFBD>ֽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @param pbuf - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ
|
|
|
|
|
* @param len - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*/
|
|
|
|
|
void SPI0_SlaveRecv(uint8_t *pbuf, uint16_t len);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief DMA<EFBFBD><EFBFBD>ʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @param pbuf - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ,<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD>ֽڶ<EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
* @param len - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*/
|
|
|
|
|
void SPI0_SlaveDMATrans(uint8_t *pbuf, uint16_t len);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief DMA<EFBFBD><EFBFBD>ʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @param pbuf - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ,<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD>ֽڶ<EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
* @param len - <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*/
|
|
|
|
|
void SPI0_SlaveDMARecv(uint8_t *pbuf, uint16_t len);
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPI0<EFBFBD>ж<EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @param s - ʹ<EFBFBD><EFBFBD>/<EFBFBD>ر<EFBFBD>
|
|
|
|
|
* @param f - refer to SPI0 interrupt bit define
|
|
|
|
|
*/
|
|
|
|
|
#define SPI0_ITCfg(s, f) ((s) ? (R8_SPI0_INTER_EN |= f) : (R8_SPI0_INTER_EN &= ~f))
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD><EFBFBD>ȡ<EFBFBD>жϱ<EFBFBD>־״̬<EFBFBD><EFBFBD>0-δ<EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD>(!0)-<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
|
|
|
*
|
|
|
|
|
* @param f - refer to SPI0 interrupt bit define
|
|
|
|
|
*/
|
|
|
|
|
#define SPI0_GetITFlag(f) (R8_SPI0_INT_FLAG & f)
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD>жϱ<EFBFBD>־
|
|
|
|
|
*
|
|
|
|
|
* @param f - refer to SPI0 interrupt bit define
|
|
|
|
|
*/
|
|
|
|
|
#define SPI0_ClearITFlag(f) (R8_SPI0_INT_FLAG = f)
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief <EFBFBD>ر<EFBFBD>SPI0
|
|
|
|
|
*/
|
|
|
|
|
#define SPI0_Disable() (R8_SPI0_CTRL_MOD &= ~(RB_SPI_MOSI_OE | RB_SPI_SCK_OE | RB_SPI_MISO_OE))
|
|
|
|
|
|
|
|
|
|
#ifdef __cplusplus
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
2025-02-21 14:38:41 +08:00
|
|
|
|
#endif // __CH58x_SPI_H__
|