This commit is contained in:
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@ -223,7 +223,7 @@ __attribute__((noinline)) void Main_Circulation()
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TMOS_SystemProcess();
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TMOS_SystemProcess();
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KEY_ProcessLoop();
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KEY_ProcessLoop();
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BSP_UART1_TxLoop();
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BSP_UART1_TxLoop();
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FEED_IWDG();
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// FEED_IWDG();
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}
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}
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}
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}
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@ -417,13 +417,10 @@ int main(void)
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LED_ALL_OFF_DEINIT;
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LED_ALL_OFF_DEINIT;
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BEEP_OFF_DEINIT;
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BEEP_OFF_DEINIT;
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// logDebug("IWDG_Init 0");
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// IWDG_Init(1500);
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BSP_NoNeedBoost();
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BSP_NoNeedBoost();
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BSP_RequestSleep();
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BSP_RequestSleep();
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IWDG_Init(IWDG_MS);
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IWDG_Init(IWDG_TIMEOUT_MS);
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// 在连接间隔和广播间隔到来时,会进入回调中喂狗
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// 在连接间隔和广播间隔到来时,会进入回调中喂狗
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// LL_AdvertiseEventRegister(BLE_AdvertiseEventCB);
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// LL_AdvertiseEventRegister(BLE_AdvertiseEventCB);
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@ -2,7 +2,7 @@
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* @Author : stark1898y 1658608470@qq.com
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* @Author : stark1898y 1658608470@qq.com
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* @Date : 2024-12-15 16:13:37
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* @Date : 2024-12-15 16:13:37
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* @LastEditors : stark1898y 1658608470@qq.com
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* @LastEditors : stark1898y 1658608470@qq.com
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* @LastEditTime : 2025-04-13 22:48:38
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* @LastEditTime : 2025-05-16 11:17:22
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* @FilePath : \BLE_TYQ_CH584M\BSP\inc\bsp_iwdg.h
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* @FilePath : \BLE_TYQ_CH584M\BSP\inc\bsp_iwdg.h
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* @Description :
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* @Description :
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*
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*
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@ -31,7 +31,8 @@
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#define RB_WR_PROTECT 0x40000000 // RO, write protect
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#define RB_WR_PROTECT 0x40000000 // RO, write protect
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#define RB_IWDG_EN 0x80000000 // RO, watch-dog enable
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#define RB_IWDG_EN 0x80000000 // RO, watch-dog enable
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#define IWDG_MS (6000)
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#define IWDG_TIMEOUT_MS (7000U)
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#define IWDG_FEED_MS (3000U)
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#define IWIG_FEED_EVENT (0x01 << 0)
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#define IWIG_FEED_EVENT (0x01 << 0)
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@ -2,7 +2,7 @@
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* @Author : stark1898y 1658608470@qq.com
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* @Author : stark1898y 1658608470@qq.com
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* @Date : 2024-12-15 16:13:41
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* @Date : 2024-12-15 16:13:41
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* @LastEditors : stark1898y 1658608470@qq.com
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* @LastEditors : stark1898y 1658608470@qq.com
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* @LastEditTime : 2025-05-15 18:34:10
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* @LastEditTime : 2025-05-16 10:55:30
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* @FilePath : \BLE_TYQ_CH584M\BSP\src\bsp_iwdg.c
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* @FilePath : \BLE_TYQ_CH584M\BSP\src\bsp_iwdg.c
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* @Description :
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* @Description :
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*
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*
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@ -30,7 +30,7 @@ uint16_t IWDG_ProcessEvent(uint8_t task_id, uint16_t events)
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{
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{
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FEED_IWDG();
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FEED_IWDG();
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logDebug("IWDG feed");
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logDebug("IWDG feed");
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tmos_start_task(task_id, IWIG_FEED_EVENT, 5000);
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tmos_start_task(task_id, IWIG_FEED_EVENT, MS1_TO_SYSTEM_TIME(IWDG_FEED_MS));
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return (events ^ IWIG_FEED_EVENT);
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return (events ^ IWIG_FEED_EVENT);
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}
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}
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return 0;
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return 0;
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@ -46,25 +46,28 @@ uint16_t IWDG_ProcessEvent(uint8_t task_id, uint16_t events)
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void IWDG_Init(uint16_t ms)
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void IWDG_Init(uint16_t ms)
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{
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{
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uint16_t div = 512;
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uint16_t div = 512;
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float tick_ms = 1000 / (32000 / 512);
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// float tick_ms = 1000 / (32000 / 512);
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uint8_t tick_ms = 16;
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uint16_t reload = (ms / tick_ms) + 1;
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uint16_t reload = (ms / tick_ms) + 1;
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// 解除IWDG保护
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// 解除IWDG保护
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R32_IWDG_KR = 0x5555;
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R32_IWDG_KR = 0x5555;
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// R32_IWDG_CFG = (RB_PR & (div << 12)) | (RB_STOP_EN) | (reload & RB_RLR);
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R32_IWDG_CFG = (RB_PR & (div << 12)) | (RB_STOP_EN) | (reload & RB_RLR);
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R32_IWDG_CFG |= (7 << 12); // 32K分频512,时钟62.5Hz
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// R32_IWDG_CFG |= (7 << 12); // 32K分频512,时钟62.5Hz
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R32_IWDG_CFG &= 0xFFFFF000;
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// R32_IWDG_CFG &= 0xFFFFF000;
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R32_IWDG_CFG |= 0x7D * 3; // 看门狗时间约256ms(0x10/(32K/512))
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// // R32_IWDG_CFG |= 0x7D * 3; // 看门狗时间约6 s(0x10/(32K/512))
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// R32_IWDG_CFG |= reload;
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// 开启IWDG保护
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// 开启IWDG保护
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R32_IWDG_KR = 0xCCCC;
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R32_IWDG_KR = 0xCCCC;
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logDebug("R32_IWDG_CFG = %X", R32_IWDG_CFG);
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logDebug("IWDG = %d, %.1f ms", reload, (reload * 1000) / 62.5);
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IWDGTaskId = TMOS_ProcessEventRegister(IWDG_ProcessEvent);
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IWDGTaskId = TMOS_ProcessEventRegister(IWDG_ProcessEvent);
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tmos_set_event(IWDGTaskId, IWIG_FEED_EVENT);
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// tmos_set_event(IWDGTaskId, IWIG_FEED_EVENT);
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tmos_start_task(IWDGTaskId, IWIG_FEED_EVENT, MS1_TO_SYSTEM_TIME(IWDG_FEED_MS));
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}
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}
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// #define RB_RESET_FLAG 0x07 // RO: recent reset flag
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// #define RB_RESET_FLAG 0x07 // RO: recent reset flag
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13
HAL/MCU.c
13
HAL/MCU.c
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@ -230,6 +230,19 @@ void HAL_Init()
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{
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{
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halTaskID = TMOS_ProcessEventRegister(HAL_ProcessEvent);
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halTaskID = TMOS_ProcessEventRegister(HAL_ProcessEvent);
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HAL_TimeInit();
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HAL_TimeInit();
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#if 0
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// 开启独立看门狗会强制开启内部32K但是开启状态没有跟内部的RC32K寄存器同步
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// ,而复位时候是根据内部RC32K寄存器状态来决定是否启动RC32K
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// 不关闭ch584的内部32KRC
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sys_safe_access_enable();
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R8_CK32K_CONFIG |= RB_CLK_INT32K_PON;
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sys_safe_access_disable();
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#endif
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sys_safe_access_enable();
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R8_SAFE_LRST_CTRL |= RB_IWDG_RST_EN;
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sys_safe_access_disable();
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#if(defined HAL_SLEEP) && (HAL_SLEEP == TRUE)
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#if(defined HAL_SLEEP) && (HAL_SLEEP == TRUE)
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HAL_SleepInit();
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HAL_SleepInit();
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#endif
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#endif
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@ -34,28 +34,28 @@ void SetSysClock(SYS_CLKTypeDef sc)
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R32_SAFE_MODE_CTRL |= RB_XROM_312M_SEL;
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R32_SAFE_MODE_CTRL |= RB_XROM_312M_SEL;
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R8_SAFE_MODE_CTRL &= ~RB_SAFE_AUTO_EN;
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R8_SAFE_MODE_CTRL &= ~RB_SAFE_AUTO_EN;
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sys_safe_access_enable();
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sys_safe_access_enable();
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if(sc == RB_CLK_SYS_MOD) // 32KHz
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if (sc == RB_CLK_SYS_MOD) // 32KHz
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{
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{
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R16_CLK_SYS_CFG |= RB_CLK_SYS_MOD;
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R16_CLK_SYS_CFG |= RB_CLK_SYS_MOD;
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}
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}
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else
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else
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{
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{
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if(sc & RB_OSC32M_SEL)
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if (sc & RB_OSC32M_SEL)
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{
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{
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if(!(R8_HFCK_PWR_CTRL & RB_CLK_XT32M_PON))
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if (!(R8_HFCK_PWR_CTRL & RB_CLK_XT32M_PON))
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{
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{
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x32M_c = R8_XT32M_TUNE;
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x32M_c = R8_XT32M_TUNE;
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R8_XT32M_TUNE |= 0x03;
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R8_XT32M_TUNE |= 0x03;
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R8_HFCK_PWR_CTRL |= RB_CLK_XT32M_PON;
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R8_HFCK_PWR_CTRL |= RB_CLK_XT32M_PON;
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clk_sys_cfg = R16_CLK_SYS_CFG;
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clk_sys_cfg = R16_CLK_SYS_CFG;
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R16_CLK_SYS_CFG |= 0xC0;
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R16_CLK_SYS_CFG |= 0xC0;
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for(i=0; i<9; i++)
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for (i = 0; i < 9; i++)
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{
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{
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__nop();
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__nop();
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}
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}
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R16_CLK_SYS_CFG = clk_sys_cfg;
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R16_CLK_SYS_CFG = clk_sys_cfg;
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R8_XT32M_TUNE = x32M_c;
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R8_XT32M_TUNE = x32M_c;
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}
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}
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}
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}
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else
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else
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R8_HFCK_PWR_CTRL |= RB_CLK_RC16M_PON;
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R8_HFCK_PWR_CTRL |= RB_CLK_RC16M_PON;
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}
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}
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if(sc & RB_XROM_SCLK_SEL) // PLL div
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if (sc & RB_XROM_SCLK_SEL) // PLL div
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{
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{
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R8_HFCK_PWR_CTRL |= RB_CLK_PLL_PON;
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R8_HFCK_PWR_CTRL |= RB_CLK_PLL_PON;
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if((sc&0x1F) == 0 )
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if ((sc & 0x1F) == 0)
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{
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{
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R8_FLASH_SCK = R8_FLASH_SCK|(1<<4);
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R8_FLASH_SCK = R8_FLASH_SCK | (1 << 4);
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R8_FLASH_CFG = 0X07;
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R8_FLASH_CFG = 0X07;
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}
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}
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else if((sc&0x1F) < 10)
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else if ((sc & 0x1F) < 10)
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{
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{
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R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4));
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R8_FLASH_SCK = R8_FLASH_SCK & (~(1 << 4));
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R8_FLASH_CFG = 0X01;
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R8_FLASH_CFG = 0X01;
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}
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}
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else if((sc&0x1F) < 16)
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else if ((sc & 0x1F) < 16)
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{
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{
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R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4));
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R8_FLASH_SCK = R8_FLASH_SCK & (~(1 << 4));
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R8_FLASH_CFG = 0X02;
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R8_FLASH_CFG = 0X02;
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}
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}
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else
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else
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{
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{
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R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4));
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R8_FLASH_SCK = R8_FLASH_SCK & (~(1 << 4));
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R8_FLASH_CFG = 0X07;
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R8_FLASH_CFG = 0X07;
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}
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}
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}
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}
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else
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else
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{
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{
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if((sc&0x1F) < 8 )
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if ((sc & 0x1F) < 8)
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{
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{
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R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4));
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R8_FLASH_SCK = R8_FLASH_SCK & (~(1 << 4));
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R8_FLASH_CFG = 0X51;
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R8_FLASH_CFG = 0X51;
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}
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}
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else
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else
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{
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{
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R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4));
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R8_FLASH_SCK = R8_FLASH_SCK & (~(1 << 4));
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R8_FLASH_CFG = 0X57;
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R8_FLASH_CFG = 0X57;
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}
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}
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}
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}
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R16_CLK_SYS_CFG = sc|0xC0;
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R16_CLK_SYS_CFG = sc | 0xC0;
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R16_CLK_SYS_CFG = sc;
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R16_CLK_SYS_CFG = sc;
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if(sc & RB_OSC32M_SEL)
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if (sc & RB_OSC32M_SEL)
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{
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{
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if((!((R8_GLOB_CFG_INFO & RB_CFG_DEBUG_EN)|(R8_GLOB_CFG_INFO & RB_CFG_ROM_READ ))) && (R8_SAFE_DEBUG_CTRL & RB_DEBUG_DIS))
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if ((!((R8_GLOB_CFG_INFO & RB_CFG_DEBUG_EN) | (R8_GLOB_CFG_INFO & RB_CFG_ROM_READ))) && (R8_SAFE_DEBUG_CTRL & RB_DEBUG_DIS))
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{
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{
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R8_HFCK_PWR_CTRL &= ~RB_CLK_RC16M_PON;
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R8_HFCK_PWR_CTRL &= ~RB_CLK_RC16M_PON;
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}
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}
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{
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{
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R8_HFCK_PWR_CTRL &= ~RB_CLK_XT32M_PON;
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R8_HFCK_PWR_CTRL &= ~RB_CLK_XT32M_PON;
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}
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}
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}
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}
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R8_SAFE_MODE_CTRL |= RB_SAFE_AUTO_EN;
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R8_SAFE_MODE_CTRL |= RB_SAFE_AUTO_EN;
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sys_safe_access_disable();
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sys_safe_access_disable();
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*
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*
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* @return none
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* @return none
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*/
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*/
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__attribute__((section(".highcode_init")))
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__attribute__((section(".highcode_init"))) void highcode_init(void)
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void highcode_init(void)
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{
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{
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R32_SAFE_MODE_CTRL |= RB_XROM_312M_SEL;
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R32_SAFE_MODE_CTRL |= RB_XROM_312M_SEL;
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R8_SAFE_MODE_CTRL &= ~RB_SAFE_AUTO_EN;
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R8_SAFE_MODE_CTRL &= ~RB_SAFE_AUTO_EN;
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sys_safe_access_enable();
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sys_safe_access_enable();
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R32_MISC_CTRL |= 5|(3<<25); //
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R32_MISC_CTRL |= 5 | (3 << 25); //
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R8_PLL_CONFIG &= ~(1 << 5); //
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R8_PLL_CONFIG &= ~(1 << 5); //
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R8_HFCK_PWR_CTRL |= RB_CLK_RC16M_PON | RB_CLK_PLL_PON;
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R8_HFCK_PWR_CTRL |= RB_CLK_RC16M_PON | RB_CLK_PLL_PON;
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R16_CLK_SYS_CFG = CLK_SOURCE_HSI_PLL_62_4MHz;
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R16_CLK_SYS_CFG = CLK_SOURCE_HSI_PLL_62_4MHz;
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R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4));
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R8_FLASH_SCK = R8_FLASH_SCK & (~(1 << 4));
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R8_FLASH_CFG = 0X02;
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R8_FLASH_CFG = 0X02;
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R8_XT32M_TUNE = (R8_XT32M_TUNE&(~0x03))|0x01;
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R8_XT32M_TUNE = (R8_XT32M_TUNE & (~0x03)) | 0x01;
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R8_CK32K_CONFIG |= RB_CLK_INT32K_PON;
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R8_CK32K_CONFIG |= RB_CLK_INT32K_PON;
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R8_SAFE_MODE_CTRL |= RB_SAFE_AUTO_EN;
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R8_SAFE_MODE_CTRL |= RB_SAFE_AUTO_EN;
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sys_safe_access_disable();
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sys_safe_access_disable();
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@ -161,7 +159,7 @@ __HIGH_CODE
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__INTERRUPT
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__INTERRUPT
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void MachineMode_Call_IRQ(void)
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void MachineMode_Call_IRQ(void)
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{
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{
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if(gs_machine_mode_func != NULL)
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if (gs_machine_mode_func != NULL)
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{
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{
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gs_machine_mode_func();
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gs_machine_mode_func();
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gs_machine_mode_func = NULL;
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gs_machine_mode_func = NULL;
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@ -185,25 +183,25 @@ void MachineMode_Call(MachineMode_Call_func func)
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uint32_t irqv;
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uint32_t irqv;
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/* 这里关闭所有中断 */
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/* 这里关闭所有中断 */
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irqv = (PFIC->ISR[0] >> 8) | (PFIC->ISR[1] << 24);
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irqv = (PFIC->ISR[0] >> 8) | (PFIC->ISR[1] << 24);
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PFIC->IRER[0] = 0xffffffff;
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PFIC->IRER[0] = 0xffffffff;
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PFIC->IRER[1] = 0xffffffff;
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PFIC->IRER[1] = 0xffffffff;
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/* 如果用户使用了SW中断的免表中断,则需要取消此函数所有注释 */
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/* 如果用户使用了SW中断的免表中断,则需要取消此函数所有注释 */
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// for(i = 0; i < 4; i++)
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// for(i = 0; i < 4; i++)
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// {
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// {
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// if(PFIC->VTFIDR[i] == SWI_IRQn)
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// if(PFIC->VTFIDR[i] == SWI_IRQn)
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// {
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// {
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// /* 找到了用户自己使用的SW中断,关闭它 */
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// /* 找到了用户自己使用的SW中断,关闭它 */
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// sw_vtf = PFIC->VTFADDR[i];
|
// sw_vtf = PFIC->VTFADDR[i];
|
||||||
// PFIC->VTFADDR[i] = (sw_vtf & 0xFFFFFFFE);
|
// PFIC->VTFADDR[i] = (sw_vtf & 0xFFFFFFFE);
|
||||||
// break;
|
// break;
|
||||||
// }
|
// }
|
||||||
// }
|
// }
|
||||||
|
|
||||||
sw_irqtable = _vector_base[SWI_IRQn];
|
sw_irqtable = _vector_base[SWI_IRQn];
|
||||||
_vector_base[SWI_IRQn] = (uint32_t)MachineMode_Call_IRQ;
|
_vector_base[SWI_IRQn] = (uint32_t)MachineMode_Call_IRQ;
|
||||||
gs_machine_mode_func = func;
|
gs_machine_mode_func = func;
|
||||||
|
|
||||||
/* 只打开SWI_IRQn */
|
/* 只打开SWI_IRQn */
|
||||||
PFIC_EnableIRQ(SWI_IRQn);
|
PFIC_EnableIRQ(SWI_IRQn);
|
||||||
|
@ -211,17 +209,17 @@ void MachineMode_Call(MachineMode_Call_func func)
|
||||||
PFIC_SetPendingIRQ(SWI_IRQn);
|
PFIC_SetPendingIRQ(SWI_IRQn);
|
||||||
|
|
||||||
/* 等待处理结束 */
|
/* 等待处理结束 */
|
||||||
while(gs_machine_mode_func != NULL);
|
while (gs_machine_mode_func != NULL);
|
||||||
|
|
||||||
PFIC_DisableIRQ(SWI_IRQn);
|
PFIC_DisableIRQ(SWI_IRQn);
|
||||||
|
|
||||||
_vector_base[SWI_IRQn] = sw_irqtable;
|
_vector_base[SWI_IRQn] = sw_irqtable;
|
||||||
|
|
||||||
// if(i != 4)
|
// if(i != 4)
|
||||||
// {
|
// {
|
||||||
// /* 恢复原本的SW免表中断 */
|
// /* 恢复原本的SW免表中断 */
|
||||||
// PFIC->VTFADDR[i] = sw_vtf;
|
// PFIC->VTFADDR[i] = sw_vtf;
|
||||||
// }
|
// }
|
||||||
|
|
||||||
/* 这里恢复原来的中断使能配置 */
|
/* 这里恢复原来的中断使能配置 */
|
||||||
PFIC->IENR[0] = (irqv << 8);
|
PFIC->IENR[0] = (irqv << 8);
|
||||||
|
@ -236,7 +234,8 @@ void MachineMode_Call(MachineMode_Call_func func)
|
||||||
* @param none
|
* @param none
|
||||||
*
|
*
|
||||||
* @return none
|
* @return none
|
||||||
*/void SetPI_func()
|
*/
|
||||||
|
void SetPI_func()
|
||||||
{
|
{
|
||||||
write_csr(0xbc0, 0x25);
|
write_csr(0xbc0, 0x25);
|
||||||
}
|
}
|
||||||
|
@ -266,22 +265,22 @@ void SYS_EnablePI()
|
||||||
*/
|
*/
|
||||||
uint32_t GetSysClock(void)
|
uint32_t GetSysClock(void)
|
||||||
{
|
{
|
||||||
if((R16_CLK_SYS_CFG & RB_CLK_SYS_MOD) == RB_CLK_SYS_MOD)
|
if ((R16_CLK_SYS_CFG & RB_CLK_SYS_MOD) == RB_CLK_SYS_MOD)
|
||||||
{ // 32K做主频
|
{ // 32K做主频
|
||||||
return (CAB_LSIFQ);
|
return (CAB_LSIFQ);
|
||||||
}
|
}
|
||||||
else if(R16_CLK_SYS_CFG & RB_XROM_SCLK_SEL)
|
else if (R16_CLK_SYS_CFG & RB_XROM_SCLK_SEL)
|
||||||
{
|
{
|
||||||
if(!(R16_CLK_SYS_CFG & 0x1f))
|
if (!(R16_CLK_SYS_CFG & 0x1f))
|
||||||
{
|
{
|
||||||
return ((R16_CLK_SYS_CFG & RB_OSC32M_SEL)?32000000:16000000);
|
return ((R16_CLK_SYS_CFG & RB_OSC32M_SEL) ? 32000000 : 16000000);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{ // PLL进行分频
|
{ // PLL进行分频
|
||||||
return (312000000 / (R16_CLK_SYS_CFG & 0x1f));
|
return (312000000 / (R16_CLK_SYS_CFG & 0x1f));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else if(R16_CLK_SYS_CFG & RB_OSC32M_SEL)
|
else if (R16_CLK_SYS_CFG & RB_OSC32M_SEL)
|
||||||
{ // 32M进行分频
|
{ // 32M进行分频
|
||||||
return (32000000 / (R16_CLK_SYS_CFG & 0x1f));
|
return (32000000 / (R16_CLK_SYS_CFG & 0x1f));
|
||||||
}
|
}
|
||||||
|
@ -302,7 +301,7 @@ uint32_t GetSysClock(void)
|
||||||
*/
|
*/
|
||||||
uint8_t SYS_GetInfoSta(SYS_InfoStaTypeDef i)
|
uint8_t SYS_GetInfoSta(SYS_InfoStaTypeDef i)
|
||||||
{
|
{
|
||||||
if(i == STA_SAFEACC_ACT)
|
if (i == STA_SAFEACC_ACT)
|
||||||
{
|
{
|
||||||
return (R8_SAFE_ACCESS_SIG & RB_SAFE_ACC_ACT);
|
return (R8_SAFE_ACCESS_SIG & RB_SAFE_ACC_ACT);
|
||||||
}
|
}
|
||||||
|
@ -342,7 +341,7 @@ void SYS_ResetExecute(void)
|
||||||
__HIGH_CODE
|
__HIGH_CODE
|
||||||
void SYS_DisableAllIrq(uint32_t *pirqv)
|
void SYS_DisableAllIrq(uint32_t *pirqv)
|
||||||
{
|
{
|
||||||
*pirqv = (PFIC->ISR[0] >> 8) | (PFIC->ISR[1] << 24);
|
*pirqv = (PFIC->ISR[0] >> 8) | (PFIC->ISR[1] << 24);
|
||||||
PFIC->IRER[0] = 0xffffffff;
|
PFIC->IRER[0] = 0xffffffff;
|
||||||
PFIC->IRER[1] = 0xffffffff;
|
PFIC->IRER[1] = 0xffffffff;
|
||||||
asm volatile("fence.i");
|
asm volatile("fence.i");
|
||||||
|
@ -391,7 +390,7 @@ void WWDG_ITCfg(FunctionalState s)
|
||||||
{
|
{
|
||||||
uint8_t ctrl = R8_RST_WDOG_CTRL;
|
uint8_t ctrl = R8_RST_WDOG_CTRL;
|
||||||
|
|
||||||
if(s == DISABLE)
|
if (s == DISABLE)
|
||||||
{
|
{
|
||||||
ctrl &= ~RB_WDOG_INT_EN;
|
ctrl &= ~RB_WDOG_INT_EN;
|
||||||
}
|
}
|
||||||
|
@ -418,7 +417,7 @@ void WWDG_ResetCfg(FunctionalState s)
|
||||||
{
|
{
|
||||||
uint8_t ctrl = R8_RST_WDOG_CTRL;
|
uint8_t ctrl = R8_RST_WDOG_CTRL;
|
||||||
|
|
||||||
if(s == DISABLE)
|
if (s == DISABLE)
|
||||||
{
|
{
|
||||||
ctrl &= ~RB_WDOG_RST_EN;
|
ctrl &= ~RB_WDOG_RST_EN;
|
||||||
}
|
}
|
||||||
|
@ -459,19 +458,18 @@ void WWDG_ClearFlag(void)
|
||||||
*/
|
*/
|
||||||
__INTERRUPT
|
__INTERRUPT
|
||||||
__HIGH_CODE
|
__HIGH_CODE
|
||||||
__attribute__((weak))
|
__attribute__((weak)) void HardFault_Handler(void)
|
||||||
void HardFault_Handler(void)
|
|
||||||
{
|
{
|
||||||
uint32_t v_mepc,v_mcause,v_mtval;
|
uint32_t v_mepc, v_mcause, v_mtval;
|
||||||
printf("hardfault\n");
|
printf("hardfault\n");
|
||||||
|
|
||||||
v_mepc=__get_MEPC();
|
v_mepc = __get_MEPC();
|
||||||
v_mcause=__get_MCAUSE();
|
v_mcause = __get_MCAUSE();
|
||||||
v_mtval=__get_MTVAL();
|
v_mtval = __get_MTVAL();
|
||||||
|
|
||||||
printf("mepc:%08x\n",v_mepc);
|
printf("mepc:%08x\n", v_mepc);
|
||||||
printf("mcause:%08x\n",v_mcause);
|
printf("mcause:%08x\n", v_mcause);
|
||||||
printf("mtval:%08x\n",v_mtval);
|
printf("mtval:%08x\n", v_mtval);
|
||||||
|
|
||||||
FLASH_ROM_SW_RESET();
|
FLASH_ROM_SW_RESET();
|
||||||
sys_safe_access_enable();
|
sys_safe_access_enable();
|
||||||
|
@ -480,7 +478,7 @@ void HardFault_Handler(void)
|
||||||
sys_safe_access_enable();
|
sys_safe_access_enable();
|
||||||
R8_RST_WDOG_CTRL |= RB_SOFTWARE_RESET;
|
R8_RST_WDOG_CTRL |= RB_SOFTWARE_RESET;
|
||||||
sys_safe_access_disable();
|
sys_safe_access_disable();
|
||||||
while(1);
|
while (1);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*********************************************************************
|
/*********************************************************************
|
||||||
|
@ -496,42 +494,42 @@ __HIGH_CODE
|
||||||
void mDelayuS(uint16_t t)
|
void mDelayuS(uint16_t t)
|
||||||
{
|
{
|
||||||
uint32_t i;
|
uint32_t i;
|
||||||
#if(FREQ_SYS == 78000000)
|
#if (FREQ_SYS == 78000000)
|
||||||
i = t * 13;
|
i = t * 13;
|
||||||
#elif(FREQ_SYS == 62400000)
|
#elif (FREQ_SYS == 62400000)
|
||||||
i = ((uint32_t)t * 78) / 5;
|
i = ((uint32_t)t * 78) / 5;
|
||||||
#elif(FREQ_SYS == 52000000)
|
#elif (FREQ_SYS == 52000000)
|
||||||
i = t * 13;
|
i = t * 13;
|
||||||
#elif(FREQ_SYS == 39000000)
|
#elif (FREQ_SYS == 39000000)
|
||||||
i = (t * 13)>>1;
|
i = (t * 13) >> 1;
|
||||||
#elif(FREQ_SYS == 26000000)
|
#elif (FREQ_SYS == 26000000)
|
||||||
i = (t * 13)>>1;
|
i = (t * 13) >> 1;
|
||||||
#elif(FREQ_SYS == 24000000)
|
#elif (FREQ_SYS == 24000000)
|
||||||
i = t * 6;
|
i = t * 6;
|
||||||
#elif(FREQ_SYS == 19500000)
|
#elif (FREQ_SYS == 19500000)
|
||||||
i = (t * 13)>>2;
|
i = (t * 13) >> 2;
|
||||||
#elif(FREQ_SYS == 32000000)
|
#elif (FREQ_SYS == 32000000)
|
||||||
i = t << 3;
|
i = t << 3;
|
||||||
#elif(FREQ_SYS == 16000000)
|
#elif (FREQ_SYS == 16000000)
|
||||||
i = t << 2;
|
i = t << 2;
|
||||||
#elif(FREQ_SYS == 13000000)
|
#elif (FREQ_SYS == 13000000)
|
||||||
i = (t * 13)>>2;
|
i = (t * 13) >> 2;
|
||||||
#elif(FREQ_SYS == 8000000)
|
#elif (FREQ_SYS == 8000000)
|
||||||
i = t << 1;
|
i = t << 1;
|
||||||
#elif(FREQ_SYS == 4000000)
|
#elif (FREQ_SYS == 4000000)
|
||||||
i = t;
|
i = t;
|
||||||
#elif(FREQ_SYS == 2000000)
|
#elif (FREQ_SYS == 2000000)
|
||||||
i = t >> 1;
|
i = t >> 1;
|
||||||
#elif(FREQ_SYS == 1000000)
|
#elif (FREQ_SYS == 1000000)
|
||||||
i = t >> 2;
|
i = t >> 2;
|
||||||
#else
|
#else
|
||||||
i = t;
|
i = t;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if((FREQ_SYS == 78000000)||\
|
#if ((FREQ_SYS == 78000000) || \
|
||||||
(FREQ_SYS == 39000000)||\
|
(FREQ_SYS == 39000000) || \
|
||||||
(FREQ_SYS == 19500000))
|
(FREQ_SYS == 19500000))
|
||||||
while(--i)
|
while (--i)
|
||||||
{
|
{
|
||||||
__nop();
|
__nop();
|
||||||
};
|
};
|
||||||
|
@ -539,7 +537,7 @@ void mDelayuS(uint16_t t)
|
||||||
do
|
do
|
||||||
{
|
{
|
||||||
__nop();
|
__nop();
|
||||||
}while(--i);
|
} while (--i);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -558,27 +556,27 @@ void mDelaymS(uint16_t t)
|
||||||
do
|
do
|
||||||
{
|
{
|
||||||
mDelayuS(1000);
|
mDelayuS(1000);
|
||||||
}while(--t);
|
} while (--t);
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
int _write(int fd, char *buf, int size)
|
int _write(int fd, char *buf, int size)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
for(i = 0; i < size; i++)
|
for (i = 0; i < size; i++)
|
||||||
{
|
{
|
||||||
#if DEBUG == Debug_UART0
|
#if DEBUG == Debug_UART0
|
||||||
while(R8_UART0_TFC == UART_FIFO_SIZE); /* 等待数据发送 */
|
while (R8_UART0_TFC == UART_FIFO_SIZE); /* 等待数据发送 */
|
||||||
R8_UART0_THR = *buf++; /* 发送数据 */
|
R8_UART0_THR = *buf++; /* 发送数据 */
|
||||||
#elif DEBUG == Debug_UART1
|
#elif DEBUG == Debug_UART1
|
||||||
while(R8_UART1_TFC == UART_FIFO_SIZE); /* 等待数据发送 */
|
while (R8_UART1_TFC == UART_FIFO_SIZE); /* 等待数据发送 */
|
||||||
R8_UART1_THR = *buf++; /* 发送数据 */
|
R8_UART1_THR = *buf++; /* 发送数据 */
|
||||||
#elif DEBUG == Debug_UART2
|
#elif DEBUG == Debug_UART2
|
||||||
while(R8_UART2_TFC == UART_FIFO_SIZE); /* 等待数据发送 */
|
while (R8_UART2_TFC == UART_FIFO_SIZE); /* 等待数据发送 */
|
||||||
R8_UART2_THR = *buf++; /* 发送数据 */
|
R8_UART2_THR = *buf++; /* 发送数据 */
|
||||||
#elif DEBUG == Debug_UART3
|
#elif DEBUG == Debug_UART3
|
||||||
while(R8_UART3_TFC == UART_FIFO_SIZE); /* 等待数据发送 */
|
while (R8_UART3_TFC == UART_FIFO_SIZE); /* 等待数据发送 */
|
||||||
R8_UART3_THR = *buf++; /* 发送数据 */
|
R8_UART3_THR = *buf++; /* 发送数据 */
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
return size;
|
return size;
|
||||||
|
@ -593,14 +591,13 @@ int _write(int fd, char *buf, int size)
|
||||||
*
|
*
|
||||||
* @return size: Data length
|
* @return size: Data length
|
||||||
*/
|
*/
|
||||||
__attribute__((used))
|
__attribute__((used)) void *_sbrk(ptrdiff_t incr)
|
||||||
void *_sbrk(ptrdiff_t incr)
|
|
||||||
{
|
{
|
||||||
extern char _end[];
|
extern char _end[];
|
||||||
static char *curbrk = _end;
|
static char *curbrk = _end;
|
||||||
|
|
||||||
if ((curbrk + incr < _end) || ((uint32_t)curbrk + incr > (__get_SP() - 64)))
|
if ((curbrk + incr < _end) || ((uint32_t)curbrk + incr > (__get_SP() - 64)))
|
||||||
return NULL - 1;
|
return NULL - 1;
|
||||||
|
|
||||||
curbrk += incr;
|
curbrk += incr;
|
||||||
return curbrk - incr;
|
return curbrk - incr;
|
||||||
|
@ -616,7 +613,7 @@ void *_sbrk(ptrdiff_t incr)
|
||||||
__HIGH_CODE
|
__HIGH_CODE
|
||||||
void *__wrap_memcpy(void *dst, void *src, size_t size)
|
void *__wrap_memcpy(void *dst, void *src, size_t size)
|
||||||
{
|
{
|
||||||
__MCPY(dst, src, (void *)((uint32_t)src+size));
|
__MCPY(dst, src, (void *)((uint32_t)src + size));
|
||||||
return dst;
|
return dst;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -661,7 +658,7 @@ void IWDG_RLR_Set(uint16_t rlr)
|
||||||
{
|
{
|
||||||
uint32_t cfg;
|
uint32_t cfg;
|
||||||
|
|
||||||
cfg = R32_IWDG_CFG;
|
cfg = R32_IWDG_CFG;
|
||||||
cfg = (R32_IWDG_CFG & ~0xFFF) | (rlr & 0xFFF);
|
cfg = (R32_IWDG_CFG & ~0xFFF) | (rlr & 0xFFF);
|
||||||
R32_IWDG_CFG = cfg;
|
R32_IWDG_CFG = cfg;
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue