338 lines
7.4 KiB
C
338 lines
7.4 KiB
C
/********************************** (C) COPYRIGHT *******************************
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* File Name : CH58x_clk.h
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* Author : WCH
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* Version : V1.2
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* Date : 2021/11/17
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* Description : head file(ch585/ch584)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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#ifndef __CH58x_CLK_H__
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#define __CH58x_CLK_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief ϵͳÖ÷Ƶ¶¨Òå
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*/
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typedef enum
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{
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CLK_SOURCE_32KHz = 0xC0,
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CLK_SOURCE_HSI_16MHz = (0x100 | 0x80),
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CLK_SOURCE_HSI_8MHz = 0x02,
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CLK_SOURCE_HSI_5_3MHz = 0x03,
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CLK_SOURCE_HSI_4MHz = 0x04,
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CLK_SOURCE_HSI_2MHz = 0x08,
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CLK_SOURCE_HSI_1MHz = 0x10,
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CLK_SOURCE_HSE_32MHz = (0x100 | 0x200 | 0x80),
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CLK_SOURCE_HSE_16MHz = (0x200 | 0x02),
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CLK_SOURCE_HSE_8MHz = (0x200 | 0x04),
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CLK_SOURCE_HSE_6_4MHz = (0x200 | 0x05),
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CLK_SOURCE_HSE_4MHz = (0x200 | 0x08),
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CLK_SOURCE_HSE_2MHz = (0x200 | 0x10),
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CLK_SOURCE_HSI_PLL_78MHz = (0x100 | 0x40 | 4),
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CLK_SOURCE_HSI_PLL_62_4MHz = (0x100 | 0x40 | 5),
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CLK_SOURCE_HSI_PLL_52MHz = (0x100 | 0x40 | 6),
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CLK_SOURCE_HSI_PLL_39MHz = (0x100 | 0x40 | 8),
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CLK_SOURCE_HSI_PLL_26MHz = (0x100 | 0x40 | 12),
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CLK_SOURCE_HSI_PLL_24MHz = (0x100 | 0x40 | 13),
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CLK_SOURCE_HSI_PLL_19_5MHz = (0x100 | 0x40 | 16),
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CLK_SOURCE_HSI_PLL_13MHz = (0x100 | 0x40 | 24),
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CLK_SOURCE_HSE_PLL_78MHz = (0x300 | 0x40 | 4),
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CLK_SOURCE_HSE_PLL_62_4MHz = (0x300 | 0x40 | 5),
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CLK_SOURCE_HSE_PLL_52MHz = (0x300 | 0x40 | 6),
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CLK_SOURCE_HSE_PLL_39MHz = (0x300 | 0x40 | 8),
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CLK_SOURCE_HSE_PLL_26MHz = (0x300 | 0x40 | 12),
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CLK_SOURCE_HSE_PLL_24MHz = (0x300 | 0x40 | 13),
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CLK_SOURCE_HSE_PLL_19_5MHz = (0x300 | 0x40 | 16),
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CLK_SOURCE_HSE_PLL_13MHz = (0x300 | 0x40 | 24),
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} SYS_CLKTypeDef;
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/**
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* @brief 32KʱÖÓÑ¡Ôñ
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*/
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typedef enum
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{
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Clk32K_LSI = 0,
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Clk32K_LSE,
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} LClk32KTypeDef;
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/**
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* @brief 32M¾§ÕñµçÁ÷µ²Î»
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*/
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typedef enum
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{
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HSE_RCur_75 = 0,
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HSE_RCur_100,
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HSE_RCur_125,
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HSE_RCur_150
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} HSECurrentTypeDef;
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/**
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* @brief 32M¾§ÕñÄÚ²¿µçÈݵ²Î»
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*/
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typedef enum
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{
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HSECap_10p = 0,
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HSECap_12p,
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HSECap_14p,
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HSECap_16p,
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HSECap_18p,
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HSECap_20p,
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HSECap_22p,
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HSECap_24p,
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HSECap_2p,
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HSECap_4p,
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HSECap_6p,
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HSECap_8p
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} HSECapTypeDef;
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/**
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* @brief LSE32K¾§ÕñµçÁ÷µ²Î»
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*/
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typedef enum
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{
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LSE_RCur_70 = 0,
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LSE_RCur_100,
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LSE_RCur_140,
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LSE_RCur_200
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} LSECurrentTypeDef;
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/**
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* @brief LSI32K¾§ÕñµçÁ÷µ²Î»
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*/
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typedef enum
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{
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LSI_RCur_70 = 0,
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LSI_RCur_100,
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LSI_RCur_140,
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LSI_RCur_200
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} LSICurrentTypeDef;
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/**
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* @brief 32K¾§ÕñÄÚ²¿µçÈݵ²Î»
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*/
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typedef enum
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{
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LSECap_2p = 0, // ¶¨Òå±£Áô£¬Êµ¼ÊÉÏΪ12p
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LSECap_12p = 0,
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LSECap_13p,
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LSECap_14p,
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LSECap_15p,
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LSECap_16p,
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LSECap_17p,
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LSECap_18p,
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LSECap_19p,
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LSECap_20p,
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LSECap_21p,
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LSECap_22p,
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LSECap_23p,
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LSECap_24p,
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LSECap_25p,
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LSECap_26p,
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LSECap_27p
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} LSECapTypeDef;
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#define RTC_MAX_COUNT 0xA8C00000
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#define MAX_DAY 0x00004000
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#define MAX_2_SEC 0x0000A8C0
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//#define MAX_SEC 0x545FFFFF
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#define BEGYEAR 2020
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#define IsLeapYear(yr) (!((yr) % 400) || (((yr) % 100) && !((yr) % 4)))
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#define YearLength(yr) (IsLeapYear(yr) ? 366 : 365)
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#define monthLength(lpyr, mon) (((mon) == 1) ? (28 + (lpyr)) : (((mon) > 6) ? (((mon) & 1) ? 31 : 30) : (((mon) & 1) ? 30 : 31)))
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/**
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* @brief rtc timer mode period define
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*/
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typedef enum
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{
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Period_0_125_S = 0, // 0.125s ÖÜÆÚ
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Period_0_25_S, // 0.25s ÖÜÆÚ
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Period_0_5_S, // 0.5s ÖÜÆÚ
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Period_1_S, // 1s ÖÜÆÚ
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Period_2_S, // 2s ÖÜÆÚ
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Period_4_S, // 4s ÖÜÆÚ
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Period_8_S, // 8s ÖÜÆÚ
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Period_16_S, // 16s ÖÜÆÚ
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} RTC_TMRCycTypeDef;
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/**
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* @brief rtc interrupt event define
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*/
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typedef enum
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{
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RTC_TRIG_EVENT = 0, // RTC ´¥·¢Ê¼þ
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RTC_TMR_EVENT, // RTC ÖÜÆÚ¶¨Ê±Ê¼þ
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} RTC_EVENTTypeDef;
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/**
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* @brief rtc interrupt event define
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*/
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typedef enum
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{
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RTC_TRIG_MODE = 0, // RTC ´¥·¢Ä£Ê½
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RTC_TMR_MODE, // RTC ÖÜÆÚ¶¨Ê±Ä£Ê½
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} RTC_MODETypeDef;
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typedef enum
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{
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/* У׼¾«¶ÈÔ½¸ß£¬ºÄʱԽ³¤ */
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Level_32 = 3, // ÓÃʱ 1.2ms
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Level_64, // ÓÃʱ 2.2ms
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Level_128, // ÓÃʱ 4.2ms
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Level_1024, // ÓÃʱ 32.2ms
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} Cali_LevelTypeDef;
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/**
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* @brief 32K µÍƵʱÖÓÀ´Ô´
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*
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* @param hc - Ñ¡Ôñ32KʹÓÃÄÚ²¿»¹ÊÇÍⲿ
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*/
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void LClk32K_Select(LClk32KTypeDef hc);
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/**
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* @brief HSE¾§Ìå Æ«ÖõçÁ÷ÅäÖÃ
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*
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* @param c - 75%,100%,125%,150%
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*/
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void HSECFG_Current(HSECurrentTypeDef c);
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/**
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* @brief HSE¾§Ìå ¸ºÔصçÈÝÅäÖÃ
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*
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* @param c - refer to HSECapTypeDef
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*/
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void HSECFG_Capacitance(HSECapTypeDef c);
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/**
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* @brief LSI¾§Ìå Æ«ÖõçÁ÷ÅäÖÃ
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*
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* @param c - 70%,100%,140%,200%
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*/
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void LSICFG_Current(LSICurrentTypeDef c);
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/**
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* @brief LSE¾§Ìå Æ«ÖõçÁ÷ÅäÖÃ
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*
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* @param c - 70%,100%,140%,200%
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*/
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void LSECFG_Current(LSECurrentTypeDef c);
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/**
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* @brief LSE¾§Ìå ¸ºÔصçÈÝÅäÖÃ
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*
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* @param c - refer to LSECapTypeDef
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*/
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void LSECFG_Capacitance(LSECapTypeDef c);
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void Calibration_LSI(Cali_LevelTypeDef cali_Lv); /* ÓÃÖ÷ƵУ׼ÄÚ²¿32KʱÖÓ */
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/**
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* @brief RTCʱÖÓ³õʼ»¯µ±Ç°Ê±¼ä
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*
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* @param y - ÅäÖÃÄ꣬MAX_Y = BEGYEAR + 44
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* @param mon - ÅäÖÃÔ£¬MAX_MON = 12
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* @param d - ÅäÖÃÈÕ£¬MAX_D = 31
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* @param h - ÅäÖÃСʱ£¬MAX_H = 23
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* @param m - ÅäÖ÷ÖÖÓ£¬MAX_M = 59
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* @param s - ÅäÖÃÃ룬MAX_S = 59
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*/
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void RTC_InitTime(uint16_t y, uint16_t mon, uint16_t d, uint16_t h, uint16_t m, uint16_t s);
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/**
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* @brief »ñÈ¡µ±Ç°Ê±¼ä
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*
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* @param py - »ñÈ¡µ½µÄÄ꣬MAX_Y = BEGYEAR + 44
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* @param pmon - »ñÈ¡µ½µÄÔ£¬MAX_MON = 12
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* @param pd - »ñÈ¡µ½µÄÈÕ£¬MAX_D = 31
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* @param ph - »ñÈ¡µ½µÄСʱ£¬MAX_H = 23
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* @param pm - »ñÈ¡µ½µÄ·ÖÖÓ£¬MAX_M = 59
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* @param ps - »ñÈ¡µ½µÄÃ룬MAX_S = 59
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*/
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void RTC_GetTime(uint16_t *py, uint16_t *pmon, uint16_t *pd, uint16_t *ph, uint16_t *pm, uint16_t *ps);
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/**
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* @brief »ùÓÚLSE/LSIʱÖÓ£¬ÅäÖõ±Ç°RTC ÖÜÆÚÊý
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*
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* @param cyc - ÅäÖÃÖÜÆÚ¼ÆÊý³õÖµ£¬MAX_CYC = 0xA8BFFFFF = 2831155199
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*/
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void RTC_SetCycle32k(uint32_t cyc);
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/**
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* @brief »ùÓÚLSE/LSIʱÖÓ£¬»ñÈ¡µ±Ç°RTC ÖÜÆÚÊý
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*
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* @return µ±Ç°ÖÜÆÚÊý£¬MAX_CYC = 0xA8BFFFFF = 2831155199
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*/
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uint32_t RTC_GetCycle32k(void);
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/**
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* @brief RTC¶¨Ê±Ä£Ê½ÅäÖã¨×¢Òⶨʱ»ù×¼¹Ì¶¨Îª32768Hz£©
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*
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* @param t - refer to RTC_TMRCycTypeDef
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*/
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void RTC_TRIGFunCfg(uint32_t cyc);
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/**
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* @brief RTC¶¨Ê±Ä£Ê½ÅäÖã¨×¢Òⶨʱ»ù×¼¹Ì¶¨Îª32768Hz£©
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*
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* @param t - refer to RTC_TMRCycTypeDef
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*/
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void RTC_TMRFunCfg(RTC_TMRCycTypeDef t);
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/**
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* @brief RTC ģʽ¹¦ÄܹرÕ
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*
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* @param m - ÐèÒª¹Ø±ÕµÄµ±Ç°Ä£Ê½
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*/
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void RTC_ModeFunDisable(RTC_MODETypeDef m);
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/**
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* @brief »ñÈ¡RTCÖжϱêÖ¾
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*
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* @param f - refer to RTC_EVENTTypeDef
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*
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* @return Öжϱê־״̬
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*/
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uint8_t RTC_GetITFlag(RTC_EVENTTypeDef f);
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/**
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* @brief Çå³ýRTCÖжϱêÖ¾
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*
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* @param f - refer to RTC_EVENTTypeDef
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*/
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void RTC_ClearITFlag(RTC_EVENTTypeDef f);
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/**
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* @brief 32K µÍƵʱÖÓµçÔ´ÅäÖÃ
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*/
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void LClk32K_Cfg(LClk32KTypeDef hc, FunctionalState s);
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#ifdef __cplusplus
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}
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#endif
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#endif // __CH58x_CLK_H__
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