444 lines
11 KiB
C
444 lines
11 KiB
C
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/********************************** (C) COPYRIGHT *******************************
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* File Name : CH58x_pwr.c
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* Author : WCH
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* Version : V1.2
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* Date : 2021/11/17
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* Description : source file(ch585/ch584)
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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#include "CH58x_common.h"
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/*********************************************************************
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* @fn PWR_DCDCCfg
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*
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* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD>DC/DC<EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڽ<EFBFBD>Լϵͳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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* @param s - <EFBFBD>Ƿ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DCDC<EFBFBD><EFBFBD>Դ
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*
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* @return none
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*/
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void PWR_DCDCCfg(FunctionalState s)
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{
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uint16_t adj = R16_AUX_POWER_ADJ;
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uint16_t plan = R16_POWER_PLAN;
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if(s == DISABLE)
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{
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adj &= ~RB_DCDC_CHARGE;
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plan &= ~(RB_PWR_DCDC_EN | RB_PWR_DCDC_PRE); // <20><>· DC/DC
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sys_safe_access_enable();
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R16_AUX_POWER_ADJ = adj;
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R16_POWER_PLAN = plan;
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sys_safe_access_disable();
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}
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else
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{
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uint32_t HW_Data[2];
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FLASH_EEPROM_CMD(CMD_GET_ROM_INFO, ROM_CFG_ADR_HW, HW_Data, 0);
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if((HW_Data[0]) & (1 << 13))
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{
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return;
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}
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adj |= RB_DCDC_CHARGE;
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plan |= RB_PWR_DCDC_PRE;
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sys_safe_access_enable();
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R16_AUX_POWER_ADJ = adj;
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R16_POWER_PLAN = plan;
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sys_safe_access_disable();
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DelayUs(10);
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sys_safe_access_enable();
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R16_POWER_PLAN |= RB_PWR_DCDC_EN;
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sys_safe_access_disable();
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}
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}
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/*********************************************************************
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* @fn PWR_UnitModCfg
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*
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* @brief <EFBFBD>ɿص<EFBFBD>Ԫģ<EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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* @param s - <EFBFBD>Ƿ<EFBFBD><EFBFBD><EFBFBD>Դ
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* @param unit - please refer to unit of controllable power supply
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*
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* @return none
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*/
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void PWR_UnitModCfg(FunctionalState s, uint8_t unit)
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{
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uint8_t ck32k_cfg = R8_CK32K_CONFIG;
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if(s == DISABLE) //<2F>ر<EFBFBD>
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{
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ck32k_cfg &= ~(unit & 0x03);
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}
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else //<2F><><EFBFBD><EFBFBD>
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{
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ck32k_cfg |= (unit & 0x03);
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}
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sys_safe_access_enable();
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R8_CK32K_CONFIG = ck32k_cfg;
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sys_safe_access_disable();
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}
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/*********************************************************************
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* @fn PWR_SafeClkCfg
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*
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* @brief <EFBFBD><EFBFBD>ȫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>ӿ<EFBFBD><EFBFBD><EFBFBD>λ
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*
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* @param s - <EFBFBD>Ƿ<EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>
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* @param perph - please refer to SAFE CLK control bit define
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*
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* @return none
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*/
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void PWR_SafeClkCfg(FunctionalState s, uint16_t perph)
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{
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uint32_t sleep_ctrl = R8_SAFE_CLK_CTRL;
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if(s == DISABLE)
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{
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sleep_ctrl |= perph;
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}
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else
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{
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sleep_ctrl &= ~perph;
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}
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sys_safe_access_enable();
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R8_SAFE_CLK_CTRL = sleep_ctrl;
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sys_safe_access_disable();
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}
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/*********************************************************************
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* @fn PWR_PeriphClkCfg
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*
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* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>ӿ<EFBFBD><EFBFBD><EFBFBD>λ
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*
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* @param s - <EFBFBD>Ƿ<EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>
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* @param perph - please refer to Peripher CLK control bit define
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*
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* @return none
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*/
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void PWR_PeriphClkCfg(FunctionalState s, uint16_t perph)
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{
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uint32_t sleep_ctrl = R32_SLEEP_CONTROL;
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if(s == DISABLE)
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{
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sleep_ctrl |= perph;
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}
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else
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{
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sleep_ctrl &= ~perph;
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}
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sys_safe_access_enable();
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R32_SLEEP_CONTROL = sleep_ctrl;
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sys_safe_access_disable();
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}
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/*********************************************************************
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* @fn PWR_PeriphWakeUpCfg
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*
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* @brief ˯<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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* @param s - <EFBFBD>Ƿ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD><EFBFBD><EFBFBD>ѹ<EFBFBD><EFBFBD><EFBFBD>
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* @param perph - <EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD>õĻ<EFBFBD><EFBFBD><EFBFBD>Դ
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* RB_SLP_USB_WAKE - USBFS Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ
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* RB_SLP_USB2_WAKE - USBHS Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ
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* RB_SLP_RTC_WAKE - RTC Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ
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* RB_SLP_GPIO_WAKE - GPIO Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ
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* RB_SLP_BAT_WAKE - BAT Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ
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* RB_GPIO_EDGE_WAKE - GPIO<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ػ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><EFBFBD>ܻ<EFBFBD><EFBFBD><EFBFBD>
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* @param mode - refer to WakeUP_ModeypeDef
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*
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* @return none
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*/
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void PWR_PeriphWakeUpCfg(FunctionalState s, uint8_t perph, WakeUP_ModeypeDef mode)
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{
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uint8_t m;
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if(s == DISABLE)
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{
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sys_safe_access_enable();
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R8_SLP_WAKE_CTRL &= ~perph;
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sys_safe_access_disable();
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}
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else
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{
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switch(mode)
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{
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case Short_Delay:
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m = 0x01;
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break;
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case Long_Delay:
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m = 0x00;
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break;
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default:
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m = 0x01;
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break;
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}
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sys_safe_access_enable();
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R8_SLP_WAKE_CTRL |= RB_WAKE_EV_MODE | perph;
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sys_safe_access_disable();
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sys_safe_access_enable();
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R8_SLP_POWER_CTRL &= ~(RB_WAKE_DLY_MOD);
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sys_safe_access_disable();
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sys_safe_access_enable();
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R8_SLP_POWER_CTRL |= m;
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sys_safe_access_disable();
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}
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}
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/*********************************************************************
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* @fn PowerMonitor
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*
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* @brief <EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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* @param s - <EFBFBD>Ƿ<EFBFBD><EFBFBD>˹<EFBFBD><EFBFBD><EFBFBD>
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* @param vl - refer to VolM_LevelypeDef
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*
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* @return none
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*/
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void PowerMonitor(FunctionalState s, VolM_LevelypeDef vl)
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{
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uint8_t ctrl = R8_BAT_DET_CTRL;
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uint8_t cfg = R8_BAT_DET_CFG;
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if(s == DISABLE)
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{
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sys_safe_access_enable();
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R8_BAT_DET_CTRL = 0;
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sys_safe_access_disable();
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}
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else
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{
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if(vl & 0x80)
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{
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cfg = vl & 0x03;
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ctrl = RB_BAT_MON_EN | ((vl >> 2) & 1);
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}
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else
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{
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cfg = vl & 0x03;
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ctrl = RB_BAT_DET_EN;
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}
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sys_safe_access_enable();
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R8_BAT_DET_CTRL = ctrl;
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R8_BAT_DET_CFG = cfg;
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sys_safe_access_disable();
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mDelayuS(1);
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sys_safe_access_enable();
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R8_BAT_DET_CTRL |= RB_BAT_LOW_IE | RB_BAT_LOWER_IE;
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sys_safe_access_disable();
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}
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}
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/*********************************************************************
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* @fn LowPower_Idle
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*
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* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>-Idleģʽ
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*
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* @param none
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*
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* @return none
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*/
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__HIGH_CODE
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void LowPower_Idle(void)
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{
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FLASH_ROM_SW_RESET();
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R8_FLASH_CTRL = 0x04; //flash<73>ر<EFBFBD>
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PFIC->SCTLR &= ~(1 << 2); // sleep
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__WFI();
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__nop();
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__nop();
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}
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/*********************************************************************
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* @fn LowPower_Halt
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*
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* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>-Haltģʽ<EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD>HSI/5ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѻ<EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>û<EFBFBD><EFBFBD>Լ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD>ϵͳʱ<EFBFBD><EFBFBD>Դ
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*
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* @param none
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*
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* @return none
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*/
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__HIGH_CODE
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void LowPower_Halt(void)
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{
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uint8_t x32Mpw;
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FLASH_ROM_SW_RESET();
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R8_FLASH_CTRL = 0x04; //flash<73>ر<EFBFBD>
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x32Mpw = R8_XT32M_TUNE;
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if(!(R8_HFCK_PWR_CTRL&RB_CLK_XT32M_KEEP))
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{
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x32Mpw = (x32Mpw & 0xfc) | 0x03; // 150%<25><EFBFBD><EEB6A8><EFBFBD><EFBFBD>
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}
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sys_safe_access_enable();
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R8_BAT_DET_CTRL = 0; // <20>رյ<D8B1>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD>
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sys_safe_access_disable();
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sys_safe_access_enable();
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R8_XT32M_TUNE = x32Mpw;
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sys_safe_access_disable();
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sys_safe_access_enable();
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R8_PLL_CONFIG |= (1 << 5);
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sys_safe_access_disable();
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PFIC->SCTLR |= (1 << 2); //deep sleep
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__WFI();
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__nop();
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__nop();
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sys_safe_access_enable();
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R8_PLL_CONFIG &= ~(1 << 5);
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sys_safe_access_disable();
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}
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/*******************************************************************************
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* Function Name : LowPower_Sleep
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* Description : <EFBFBD><EFBFBD><EFBFBD><EFBFBD>-Sleepģʽ<EFBFBD><EFBFBD>
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* Input : rm:
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RB_PWR_RAM32K - 32K retention SRAM <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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RB_PWR_RAM96K - 96K main SRAM <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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RB_PWR_EXTEND - USB <EFBFBD><EFBFBD> BLE <EFBFBD><EFBFBD>Ԫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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RB_PWR_XROM - FlashROM <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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NULL - <EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD>Ԫ<EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD>
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* Return : None
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*******************************************************************************/
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__HIGH_CODE
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void LowPower_Sleep(uint16_t rm)
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{
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__attribute__((aligned(4))) uint8_t MacAddr[6] = {0};
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uint8_t x32Mpw;
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uint16_t power_plan;
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uint16_t clk_sys_cfg;
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uint16_t hfck_pwr_ctrl;
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GetMACAddress(MacAddr);
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clk_sys_cfg = R16_CLK_SYS_CFG;
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hfck_pwr_ctrl = R8_HFCK_PWR_CTRL;
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x32Mpw = R8_XT32M_TUNE;
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x32Mpw = (x32Mpw & 0xfc) | 0x03; // 150%<25><EFBFBD><EEB6A8><EFBFBD><EFBFBD>
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sys_safe_access_enable();
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R8_BAT_DET_CTRL = 0; // <20>رյ<D8B1>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD>
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sys_safe_access_disable();
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sys_safe_access_enable();
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R8_XT32M_TUNE = x32Mpw;
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sys_safe_access_disable();
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sys_safe_access_enable();
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R16_POWER_PLAN &= ~RB_XT_PRE_EN;
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sys_safe_access_disable();
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PFIC->SCTLR |= (1 << 2); //deep sleep
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power_plan = R16_POWER_PLAN & (RB_PWR_DCDC_EN | RB_PWR_DCDC_PRE);
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power_plan |= RB_PWR_PLAN_EN | RB_PWR_CORE | rm | (2<<11);
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sys_safe_access_enable();
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if(rm & RB_XT_PRE_EN)
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{
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R8_SLP_POWER_CTRL |= 0x41;
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}
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else
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{
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R8_SLP_POWER_CTRL |= 0x40;
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}
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R16_POWER_PLAN = power_plan;
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R8_HFCK_PWR_CTRL |= RB_CLK_RC16M_PON; //˯<><CBAF><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD>HSI֮<49><D6AE>˯
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sys_safe_access_disable();
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if((R16_CLK_SYS_CFG & RB_CLK_SYS_MOD) == 0x40)
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{
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sys_safe_access_enable();
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|||
|
R16_CLK_SYS_CFG = (R16_CLK_SYS_CFG&(~RB_CLK_PLL_DIV))|24;
|
|||
|
sys_safe_access_disable();
|
|||
|
}
|
|||
|
// sys_safe_access_enable();
|
|||
|
// R8_PLL_CONFIG |= (1 << 5);
|
|||
|
// sys_safe_access_disable();
|
|||
|
|
|||
|
__WFI();
|
|||
|
__nop();
|
|||
|
__nop();
|
|||
|
|
|||
|
sys_safe_access_enable();
|
|||
|
R16_CLK_SYS_CFG = clk_sys_cfg;
|
|||
|
R8_HFCK_PWR_CTRL = hfck_pwr_ctrl;
|
|||
|
sys_safe_access_disable();
|
|||
|
sys_safe_access_enable();
|
|||
|
R16_POWER_PLAN &= ~RB_PWR_PLAN_EN;
|
|||
|
sys_safe_access_disable();
|
|||
|
|
|||
|
sys_safe_access_enable();
|
|||
|
R16_POWER_PLAN &= ~RB_XT_PRE_EN;
|
|||
|
sys_safe_access_disable();
|
|||
|
|
|||
|
// sys_safe_access_enable();
|
|||
|
// R8_PLL_CONFIG &= ~(1 << 5);
|
|||
|
// sys_safe_access_disable();
|
|||
|
DelayUs(40);
|
|||
|
}
|
|||
|
|
|||
|
/*********************************************************************
|
|||
|
* @fn LowPower_Shutdown
|
|||
|
*
|
|||
|
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>-Shutdownģʽ<EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD>HSI/5ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѻ<EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>û<EFBFBD><EFBFBD>Լ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD>ϵͳʱ<EFBFBD><EFBFBD>Դ
|
|||
|
* @note ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ô˺<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DCDC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD>ƹرգ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֶ<EFBFBD><EFBFBD>ٴδ<EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*
|
|||
|
* @param rm - <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD>
|
|||
|
* RB_PWR_RAM32K - 32K retention SRAM <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* RB_PWR_RAM96K - 96K main SRAM <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* RB_PWR_EXTEND - USB <EFBFBD><EFBFBD> BLE <EFBFBD><EFBFBD>Ԫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* NULL - <EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD>Ԫ<EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD>
|
|||
|
*
|
|||
|
* @return none
|
|||
|
*/
|
|||
|
__HIGH_CODE
|
|||
|
void LowPower_Shutdown(uint16_t rm)
|
|||
|
{
|
|||
|
uint8_t x32Kpw, x32Mpw;
|
|||
|
|
|||
|
FLASH_ROM_SW_RESET();
|
|||
|
x32Kpw = R8_XT32K_TUNE;
|
|||
|
x32Mpw = R8_XT32M_TUNE;
|
|||
|
x32Mpw = (x32Mpw & 0xfc) | 0x03; // 150%<25><EFBFBD><EEB6A8><EFBFBD><EFBFBD>
|
|||
|
x32Kpw = (x32Kpw & 0xfc) | 0x01; // LSE<53><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD><CDB5><EFBFBD><EEB6A8><EFBFBD><EFBFBD>
|
|||
|
|
|||
|
sys_safe_access_enable();
|
|||
|
R8_BAT_DET_CTRL = 0; // <20>رյ<D8B1>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD>
|
|||
|
sys_safe_access_disable();
|
|||
|
sys_safe_access_enable();
|
|||
|
R8_XT32K_TUNE = x32Kpw;
|
|||
|
R8_XT32M_TUNE = x32Mpw;
|
|||
|
sys_safe_access_disable();
|
|||
|
|
|||
|
PFIC->SCTLR |= (1 << 2); //deep sleep
|
|||
|
|
|||
|
sys_safe_access_enable();
|
|||
|
R8_SLP_POWER_CTRL |= 0x40;
|
|||
|
sys_safe_access_disable();
|
|||
|
sys_safe_access_enable();
|
|||
|
R16_POWER_PLAN = RB_PWR_PLAN_EN | rm;
|
|||
|
sys_safe_access_disable();
|
|||
|
__WFI();
|
|||
|
__nop();
|
|||
|
__nop();
|
|||
|
FLASH_ROM_SW_RESET();
|
|||
|
sys_safe_access_enable();
|
|||
|
R8_RST_WDOG_CTRL |= RB_SOFTWARE_RESET;
|
|||
|
sys_safe_access_disable();
|
|||
|
}
|