diff --git a/HAL/include/CONFIG.h b/HAL/include/CONFIG.h index d070685..e4d871b 100644 --- a/HAL/include/CONFIG.h +++ b/HAL/include/CONFIG.h @@ -122,7 +122,7 @@ #define CLK_OSC32K 1 // 该项请勿在此修改,必须在工程配置里的预处理中修改,如包含主机角色必须使用外部32K #endif #ifndef BLE_MEMHEAP_SIZE -#define BLE_MEMHEAP_SIZE (1024*8) +#define BLE_MEMHEAP_SIZE (1024*10) #endif #ifndef BLE_BUFF_MAX_LEN #define BLE_BUFF_MAX_LEN 251 // MTU https://www.cnblogs.com/gscw/p/17896209.html @@ -134,7 +134,7 @@ #define BLE_TX_NUM_EVENT 1 #endif #ifndef BLE_TX_POWER -#define BLE_TX_POWER LL_TX_POWEER_4_DBM +#define BLE_TX_POWER LL_TX_POWEER_0_DBM #endif #ifndef PERIPHERAL_MAX_CONNECTION #define PERIPHERAL_MAX_CONNECTION 1 diff --git a/Startup/startup_CH585.S b/Startup/startup_CH585.S index b293657..e0fe74e 100644 --- a/Startup/startup_CH585.S +++ b/Startup/startup_CH585.S @@ -6,7 +6,7 @@ * Description : ********************************************************************************* * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. - * Attention: This software (modified or not) and binary are used for + * Attention: This software (modified or not) and binary are used for * microcontroller manufactured by Nanjing Qinheng Microelectronics. *******************************************************************************/ @@ -125,24 +125,24 @@ PWMX_SPI1_IRQHandler: TMR3_IRQHandler: UART2_IRQHandler: UART3_IRQHandler: -WDOG_BAT_IRQHandler: +WDOG_BAT_IRQHandler: NFC_IRQHandler: USB2_DEVICE_IRQHandler: USB2_HOST_IRQHandler: LED_IRQHandler: -1: +1: j 1b .section .handle_reset,"ax",@progbits .weak handle_reset .align 1 handle_reset: -.option push -.option norelax +.option push +.option norelax la gp, __global_pointer$ -.option pop +.option pop 1: - la sp, _eusrstack + la sp, _eusrstack /* Load highcode_init code section from flash to RAM */ 2: @@ -210,7 +210,7 @@ __highcode_init: csrw 0x804, t0 li t0, 0x1 csrw 0xbc1, t0 - + li t0, 0x88 csrw mstatus, t0 la t0, _vector_base @@ -221,5 +221,5 @@ __highcode_init: la t0, main csrw mepc, t0 - + mret diff --git a/StdPeriphDriver/CH58x_pwr.c b/StdPeriphDriver/CH58x_pwr.c index 4df395c..25daa80 100644 --- a/StdPeriphDriver/CH58x_pwr.c +++ b/StdPeriphDriver/CH58x_pwr.c @@ -6,7 +6,7 @@ * Description : source file(ch585/ch584) ********************************************************************************* * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. - * Attention: This software (modified or not) and binary are used for + * Attention: This software (modified or not) and binary are used for * microcontroller manufactured by Nanjing Qinheng Microelectronics. *******************************************************************************/ @@ -28,7 +28,7 @@ void PWR_DCDCCfg(FunctionalState s) if(s == DISABLE) { - + adj &= ~RB_DCDC_CHARGE; plan &= ~(RB_PWR_DCDC_EN | RB_PWR_DCDC_PRE); // 旁路 DC/DC sys_safe_access_enable(); @@ -227,7 +227,7 @@ void PowerMonitor(FunctionalState s, VolM_LevelypeDef vl) } else { - + cfg = vl & 0x03; ctrl = RB_BAT_DET_EN; } @@ -374,7 +374,7 @@ void LowPower_Sleep(uint16_t rm) flash_sck = R8_FLASH_SCK; sys_safe_access_enable(); - // R8_BAT_DET_CTRL = 0; // 关闭电压监控 + R8_BAT_DET_CTRL = 0; // 关闭电压监控 sys_safe_access_disable(); sys_safe_access_enable(); R8_XT32M_TUNE = x32Mpw; diff --git a/StdPeriphDriver/CH58x_sys.c b/StdPeriphDriver/CH58x_sys.c index bc6c799..0c78b0d 100644 --- a/StdPeriphDriver/CH58x_sys.c +++ b/StdPeriphDriver/CH58x_sys.c @@ -6,7 +6,7 @@ * Description : source file(ch585/ch584) ********************************************************************************* * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. - * Attention: This software (modified or not) and binary are used for + * Attention: This software (modified or not) and binary are used for * microcontroller manufactured by Nanjing Qinheng Microelectronics. *******************************************************************************/ @@ -34,28 +34,28 @@ void SetSysClock(SYS_CLKTypeDef sc) R32_SAFE_MODE_CTRL |= RB_XROM_312M_SEL; R8_SAFE_MODE_CTRL &= ~RB_SAFE_AUTO_EN; sys_safe_access_enable(); - if (sc == RB_CLK_SYS_MOD) // 32KHz + if(sc == RB_CLK_SYS_MOD) // 32KHz { R16_CLK_SYS_CFG |= RB_CLK_SYS_MOD; } else { - if (sc & RB_OSC32M_SEL) + if(sc & RB_OSC32M_SEL) { - if (!(R8_HFCK_PWR_CTRL & RB_CLK_XT32M_PON)) + if(!(R8_HFCK_PWR_CTRL & RB_CLK_XT32M_PON)) { x32M_c = R8_XT32M_TUNE; R8_XT32M_TUNE |= 0x03; R8_HFCK_PWR_CTRL |= RB_CLK_XT32M_PON; clk_sys_cfg = R16_CLK_SYS_CFG; R16_CLK_SYS_CFG |= 0xC0; - for (i = 0; i < 9; i++) + for(i=0; i<9; i++) { __nop(); } R16_CLK_SYS_CFG = clk_sys_cfg; - R8_XT32M_TUNE = x32M_c; + R8_XT32M_TUNE = x32M_c; } } else @@ -63,50 +63,50 @@ void SetSysClock(SYS_CLKTypeDef sc) R8_HFCK_PWR_CTRL |= RB_CLK_RC16M_PON; } - if (sc & RB_XROM_SCLK_SEL) // PLL div + if(sc & RB_XROM_SCLK_SEL) // PLL div { R8_HFCK_PWR_CTRL |= RB_CLK_PLL_PON; - if ((sc & 0x1F) == 0) + if((sc&0x1F) == 0 ) { - R8_FLASH_SCK = R8_FLASH_SCK | (1 << 4); + R8_FLASH_SCK = R8_FLASH_SCK|(1<<4); R8_FLASH_CFG = 0X07; } - else if ((sc & 0x1F) < 10) + else if((sc&0x1F) < 10) { - R8_FLASH_SCK = R8_FLASH_SCK & (~(1 << 4)); + R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4)); R8_FLASH_CFG = 0X01; } - else if ((sc & 0x1F) < 16) + else if((sc&0x1F) < 16) { - R8_FLASH_SCK = R8_FLASH_SCK & (~(1 << 4)); + R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4)); R8_FLASH_CFG = 0X02; } else { - R8_FLASH_SCK = R8_FLASH_SCK & (~(1 << 4)); + R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4)); R8_FLASH_CFG = 0X07; } } else { - if ((sc & 0x1F) < 8) + if((sc&0x1F) < 8 ) { - R8_FLASH_SCK = R8_FLASH_SCK & (~(1 << 4)); + R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4)); R8_FLASH_CFG = 0X51; } else { - R8_FLASH_SCK = R8_FLASH_SCK & (~(1 << 4)); + R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4)); R8_FLASH_CFG = 0X57; } } - R16_CLK_SYS_CFG = sc | 0xC0; + R16_CLK_SYS_CFG = sc|0xC0; R16_CLK_SYS_CFG = sc; - if (sc & RB_OSC32M_SEL) + if(sc & RB_OSC32M_SEL) { - if ((!((R8_GLOB_CFG_INFO & RB_CFG_DEBUG_EN) | (R8_GLOB_CFG_INFO & RB_CFG_ROM_READ))) && (R8_SAFE_DEBUG_CTRL & RB_DEBUG_DIS)) + if((!((R8_GLOB_CFG_INFO & RB_CFG_DEBUG_EN)|(R8_GLOB_CFG_INFO & RB_CFG_ROM_READ ))) && (R8_SAFE_DEBUG_CTRL & RB_DEBUG_DIS)) { R8_HFCK_PWR_CTRL &= ~RB_CLK_RC16M_PON; } @@ -115,6 +115,7 @@ void SetSysClock(SYS_CLKTypeDef sc) { R8_HFCK_PWR_CTRL &= ~RB_CLK_XT32M_PON; } + } R8_SAFE_MODE_CTRL |= RB_SAFE_AUTO_EN; sys_safe_access_disable(); @@ -135,13 +136,13 @@ void highcode_init(void) R32_SAFE_MODE_CTRL |= RB_XROM_312M_SEL; R8_SAFE_MODE_CTRL &= ~RB_SAFE_AUTO_EN; sys_safe_access_enable(); - R32_MISC_CTRL |= 5 | (3 << 25); // - R8_PLL_CONFIG &= ~(1 << 5); // + R32_MISC_CTRL |= 5|(3<<25); // + R8_PLL_CONFIG &= ~(1 << 5); // R8_HFCK_PWR_CTRL |= RB_CLK_RC16M_PON | RB_CLK_PLL_PON; R16_CLK_SYS_CFG = CLK_SOURCE_HSI_PLL_62_4MHz; - R8_FLASH_SCK = R8_FLASH_SCK & (~(1 << 4)); - R8_FLASH_CFG = 0X02; - R8_XT32M_TUNE = (R8_XT32M_TUNE & (~0x03)) | 0x01; + R8_FLASH_SCK = R8_FLASH_SCK & (~(1<<4)); + R8_FLASH_CFG = 0X02; + R8_XT32M_TUNE = (R8_XT32M_TUNE&(~0x03))|0x01; R8_CK32K_CONFIG |= RB_CLK_INT32K_PON; R8_SAFE_MODE_CTRL |= RB_SAFE_AUTO_EN; sys_safe_access_disable(); @@ -160,7 +161,7 @@ __HIGH_CODE __INTERRUPT void MachineMode_Call_IRQ(void) { - if (gs_machine_mode_func != NULL) + if(gs_machine_mode_func != NULL) { gs_machine_mode_func(); gs_machine_mode_func = NULL; @@ -184,25 +185,25 @@ void MachineMode_Call(MachineMode_Call_func func) uint32_t irqv; /* 这里关闭所有中断 */ - irqv = (PFIC->ISR[0] >> 8) | (PFIC->ISR[1] << 24); + irqv = (PFIC->ISR[0] >> 8) | (PFIC->ISR[1] << 24); PFIC->IRER[0] = 0xffffffff; PFIC->IRER[1] = 0xffffffff; /* 如果用户使用了SW中断的免表中断,则需要取消此函数所有注释 */ - // for(i = 0; i < 4; i++) - // { - // if(PFIC->VTFIDR[i] == SWI_IRQn) - // { - // /* 找到了用户自己使用的SW中断,关闭它 */ - // sw_vtf = PFIC->VTFADDR[i]; - // PFIC->VTFADDR[i] = (sw_vtf & 0xFFFFFFFE); - // break; - // } - // } +// for(i = 0; i < 4; i++) +// { +// if(PFIC->VTFIDR[i] == SWI_IRQn) +// { +// /* 找到了用户自己使用的SW中断,关闭它 */ +// sw_vtf = PFIC->VTFADDR[i]; +// PFIC->VTFADDR[i] = (sw_vtf & 0xFFFFFFFE); +// break; +// } +// } - sw_irqtable = _vector_base[SWI_IRQn]; + sw_irqtable = _vector_base[SWI_IRQn]; _vector_base[SWI_IRQn] = (uint32_t)MachineMode_Call_IRQ; - gs_machine_mode_func = func; + gs_machine_mode_func = func; /* 只打开SWI_IRQn */ PFIC_EnableIRQ(SWI_IRQn); @@ -210,17 +211,17 @@ void MachineMode_Call(MachineMode_Call_func func) PFIC_SetPendingIRQ(SWI_IRQn); /* 等待处理结束 */ - while (gs_machine_mode_func != NULL); + while(gs_machine_mode_func != NULL); PFIC_DisableIRQ(SWI_IRQn); _vector_base[SWI_IRQn] = sw_irqtable; - // if(i != 4) - // { - // /* 恢复原本的SW免表中断 */ - // PFIC->VTFADDR[i] = sw_vtf; - // } +// if(i != 4) +// { +// /* 恢复原本的SW免表中断 */ +// PFIC->VTFADDR[i] = sw_vtf; +// } /* 这里恢复原来的中断使能配置 */ PFIC->IENR[0] = (irqv << 8); @@ -235,8 +236,7 @@ void MachineMode_Call(MachineMode_Call_func func) * @param none * * @return none - */ -void SetPI_func() + */void SetPI_func() { write_csr(0xbc0, 0x25); } @@ -266,22 +266,22 @@ void SYS_EnablePI() */ uint32_t GetSysClock(void) { - if ((R16_CLK_SYS_CFG & RB_CLK_SYS_MOD) == RB_CLK_SYS_MOD) + if((R16_CLK_SYS_CFG & RB_CLK_SYS_MOD) == RB_CLK_SYS_MOD) { // 32K做主频 return (CAB_LSIFQ); } - else if (R16_CLK_SYS_CFG & RB_XROM_SCLK_SEL) + else if(R16_CLK_SYS_CFG & RB_XROM_SCLK_SEL) { - if (!(R16_CLK_SYS_CFG & 0x1f)) + if(!(R16_CLK_SYS_CFG & 0x1f)) { - return ((R16_CLK_SYS_CFG & RB_OSC32M_SEL) ? 32000000 : 16000000); + return ((R16_CLK_SYS_CFG & RB_OSC32M_SEL)?32000000:16000000); } else - { // PLL进行分频 + { // PLL进行分频 return (312000000 / (R16_CLK_SYS_CFG & 0x1f)); } } - else if (R16_CLK_SYS_CFG & RB_OSC32M_SEL) + else if(R16_CLK_SYS_CFG & RB_OSC32M_SEL) { // 32M进行分频 return (32000000 / (R16_CLK_SYS_CFG & 0x1f)); } @@ -302,7 +302,7 @@ uint32_t GetSysClock(void) */ uint8_t SYS_GetInfoSta(SYS_InfoStaTypeDef i) { - if (i == STA_SAFEACC_ACT) + if(i == STA_SAFEACC_ACT) { return (R8_SAFE_ACCESS_SIG & RB_SAFE_ACC_ACT); } @@ -342,7 +342,7 @@ void SYS_ResetExecute(void) __HIGH_CODE void SYS_DisableAllIrq(uint32_t *pirqv) { - *pirqv = (PFIC->ISR[0] >> 8) | (PFIC->ISR[1] << 24); + *pirqv = (PFIC->ISR[0] >> 8) | (PFIC->ISR[1] << 24); PFIC->IRER[0] = 0xffffffff; PFIC->IRER[1] = 0xffffffff; asm volatile("fence.i"); @@ -391,7 +391,7 @@ void WWDG_ITCfg(FunctionalState s) { uint8_t ctrl = R8_RST_WDOG_CTRL; - if (s == DISABLE) + if(s == DISABLE) { ctrl &= ~RB_WDOG_INT_EN; } @@ -418,7 +418,7 @@ void WWDG_ResetCfg(FunctionalState s) { uint8_t ctrl = R8_RST_WDOG_CTRL; - if (s == DISABLE) + if(s == DISABLE) { ctrl &= ~RB_WDOG_RST_EN; } @@ -459,20 +459,9 @@ void WWDG_ClearFlag(void) */ __INTERRUPT __HIGH_CODE -__attribute__((weak)) void HardFault_Handler(void) +__attribute__((weak)) +void HardFault_Handler(void) { -#if 0 - uint32_t v_mepc, v_mcause, v_mtval; - printf("hardfault\n"); - - v_mepc = __get_MEPC(); - v_mcause = __get_MCAUSE(); - v_mtval = __get_MTVAL(); - - printf("mepc:%08x\n", v_mepc); - printf("mcause:%08x\n", v_mcause); - printf("mtval:%08x\n", v_mtval); - FLASH_ROM_SW_RESET(); sys_safe_access_enable(); R16_INT32K_TUNE = 0xFFFF; @@ -480,48 +469,7 @@ __attribute__((weak)) void HardFault_Handler(void) sys_safe_access_enable(); R8_RST_WDOG_CTRL |= RB_SOFTWARE_RESET; sys_safe_access_disable(); -#endif - struct __MEMORY_CTL - { - struct __MEMORY_CTL *pNext; - uint16_t len; - uint16_t used; - }; - typedef struct __MEMORY_CTL MemoryCtl; - - extern MemoryCtl *MemCtlStart; - extern MemoryCtl *MemCtlEnd; - MemoryCtl *MemHead; - MemHead = MemCtlStart; - while (MemHead != MemCtlEnd) - { - printf("|%8x,%8x,%8d.....\n", MemHead->used, (uint32_t)MemHead, - (uint32_t)(MemHead->pNext) - (uint32_t)MemHead - sizeof(struct __MEMORY_CTL)); - MemHead = MemHead->pNext; - } - printf("\n"); - - uint32_t v_mepc, v_mcause, v_mtval; - printf("hardfault\n"); - - v_mepc = __get_MEPC(); - v_mcause = __get_MCAUSE(); - v_mtval = __get_MTVAL(); - - printf("mepc:%08x\n", v_mepc); - printf("mcause:%08x\n", v_mcause); - printf("mtval:%08x\n", v_mtval); - -#if 0 - FLASH_ROM_SW_RESET(); - sys_safe_access_enable(); - R16_INT32K_TUNE = 0xFFFF; - sys_safe_access_disable(); - sys_safe_access_enable(); - R8_RST_WDOG_CTRL |= RB_SOFTWARE_RESET; - sys_safe_access_disable(); -#endif - while (1); + while(1); } /********************************************************************* @@ -537,42 +485,42 @@ __HIGH_CODE void mDelayuS(uint16_t t) { uint32_t i; -#if (FREQ_SYS == 78000000) +#if(FREQ_SYS == 78000000) i = t * 13; -#elif (FREQ_SYS == 62400000) +#elif(FREQ_SYS == 62400000) i = ((uint32_t)t * 78) / 5; -#elif (FREQ_SYS == 52000000) +#elif(FREQ_SYS == 52000000) i = t * 13; -#elif (FREQ_SYS == 39000000) - i = (t * 13) >> 1; -#elif (FREQ_SYS == 26000000) - i = (t * 13) >> 1; -#elif (FREQ_SYS == 24000000) +#elif(FREQ_SYS == 39000000) + i = (t * 13)>>1; +#elif(FREQ_SYS == 26000000) + i = (t * 13)>>1; +#elif(FREQ_SYS == 24000000) i = t * 6; -#elif (FREQ_SYS == 19500000) - i = (t * 13) >> 2; -#elif (FREQ_SYS == 32000000) +#elif(FREQ_SYS == 19500000) + i = (t * 13)>>2; +#elif(FREQ_SYS == 32000000) i = t << 3; -#elif (FREQ_SYS == 16000000) +#elif(FREQ_SYS == 16000000) i = t << 2; -#elif (FREQ_SYS == 13000000) - i = (t * 13) >> 2; -#elif (FREQ_SYS == 8000000) +#elif(FREQ_SYS == 13000000) + i = (t * 13)>>2; +#elif(FREQ_SYS == 8000000) i = t << 1; -#elif (FREQ_SYS == 4000000) +#elif(FREQ_SYS == 4000000) i = t; -#elif (FREQ_SYS == 2000000) +#elif(FREQ_SYS == 2000000) i = t >> 1; -#elif (FREQ_SYS == 1000000) +#elif(FREQ_SYS == 1000000) i = t >> 2; #else i = t; #endif -#if ((FREQ_SYS == 78000000) || \ - (FREQ_SYS == 39000000) || \ - (FREQ_SYS == 19500000)) - while (--i) +#if((FREQ_SYS == 78000000)||\ + (FREQ_SYS == 39000000)||\ + (FREQ_SYS == 19500000)) + while(--i) { __nop(); }; @@ -580,7 +528,7 @@ void mDelayuS(uint16_t t) do { __nop(); - } while (--i); + }while(--i); #endif } @@ -599,27 +547,27 @@ void mDelaymS(uint16_t t) do { mDelayuS(1000); - } while (--t); + }while(--t); } #ifdef DEBUG int _write(int fd, char *buf, int size) { int i; - for (i = 0; i < size; i++) + for(i = 0; i < size; i++) { #if DEBUG == Debug_UART0 - while (R8_UART0_TFC == UART_FIFO_SIZE); /* 等待数据发送 */ - R8_UART0_THR = *buf++; /* 发送数据 */ + while(R8_UART0_TFC == UART_FIFO_SIZE); /* 等待数据发送 */ + R8_UART0_THR = *buf++; /* 发送数据 */ #elif DEBUG == Debug_UART1 - while (R8_UART1_TFC == UART_FIFO_SIZE); /* 等待数据发送 */ - R8_UART1_THR = *buf++; /* 发送数据 */ + while(R8_UART1_TFC == UART_FIFO_SIZE); /* 等待数据发送 */ + R8_UART1_THR = *buf++; /* 发送数据 */ #elif DEBUG == Debug_UART2 - while (R8_UART2_TFC == UART_FIFO_SIZE); /* 等待数据发送 */ - R8_UART2_THR = *buf++; /* 发送数据 */ -#elif DEBUG == Debug_UART3 - while (R8_UART3_TFC == UART_FIFO_SIZE); /* 等待数据发送 */ - R8_UART3_THR = *buf++; /* 发送数据 */ + while(R8_UART2_TFC == UART_FIFO_SIZE); /* 等待数据发送 */ + R8_UART2_THR = *buf++; /* 发送数据 */ +#elif DEBUG == Debug_UART3 + while(R8_UART3_TFC == UART_FIFO_SIZE); /* 等待数据发送 */ + R8_UART3_THR = *buf++; /* 发送数据 */ #endif } return size; @@ -634,13 +582,14 @@ int _write(int fd, char *buf, int size) * * @return size: Data length */ -__attribute__((used)) void *_sbrk(ptrdiff_t incr) +__attribute__((used)) +void *_sbrk(ptrdiff_t incr) { extern char _end[]; static char *curbrk = _end; if ((curbrk + incr < _end) || ((uint32_t)curbrk + incr > (__get_SP() - 64))) - return NULL - 1; + return NULL - 1; curbrk += incr; return curbrk - incr; @@ -656,7 +605,7 @@ __attribute__((used)) void *_sbrk(ptrdiff_t incr) __HIGH_CODE void *__wrap_memcpy(void *dst, void *src, size_t size) { - __MCPY(dst, src, (void *)((uint32_t)src + size)); + __MCPY(dst, src, (void *)((uint32_t)src+size)); return dst; } @@ -701,7 +650,7 @@ void IWDG_RLR_Set(uint16_t rlr) { uint32_t cfg; - cfg = R32_IWDG_CFG; - cfg = (R32_IWDG_CFG & ~0xFFF) | (rlr & 0xFFF); + cfg = R32_IWDG_CFG; + cfg = (R32_IWDG_CFG & ~0xFFF) | (rlr & 0xFFF); R32_IWDG_CFG = cfg; } diff --git a/StdPeriphDriver/CH58x_timer3.c b/StdPeriphDriver/CH58x_timer3.c index d85baf9..bcae936 100644 --- a/StdPeriphDriver/CH58x_timer3.c +++ b/StdPeriphDriver/CH58x_timer3.c @@ -6,7 +6,7 @@ * Description : source file(ch585/ch584) ********************************************************************************* * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. - * Attention: This software (modified or not) and binary are used for + * Attention: This software (modified or not) and binary are used for * microcontroller manufactured by Nanjing Qinheng Microelectronics. *******************************************************************************/