SXDT-Embedded
/
CIU32_L051_M307R
mirror of https://gitee.com/SXDT-Embedded/ciu32_-l051_-m307-r.git
6
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
CIU32_L051_M307R/Peripheral/CIU32L051_Lib/Include/ciu32l051_std_spi.h

564 lines
15 KiB
C
Raw Normal View History

移植了RTThread和RTT打印，并完成了串口的DMA中断发送，和串口空闲中断+DMA接收，测试通过
2024-08-22 16:24:54 +08:00
/************************************************************************************************/
/**
* @file ciu32l051_std_spi.h
* @author MCU Ecosystem Development Team
* @brief SPI STD<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD>ṩSPI<EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>STD<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD><EFBFBD>塣
*
*
**************************************************************************************************
* @attention
* Copyright (c) CEC Huada Electronic Design Co.,Ltd. All rights reserved.
*
**************************************************************************************************
*/
/* <20><><EFBFBD><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD><C4BC>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD> */
#ifndef CIU32L051_STD_SPI_H
#define CIU32L051_STD_SPI_H
/************************************************************************************************/
/**
* @addtogroup CIU32L051_STD_Driver
* @{
*/
/**
* @defgroup SPI SPI
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڵ<EFBFBD>STD<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @{
*/
/************************************************************************************************/
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------includes--------------------------------------------*/
#include "ciu32l051_std_common.h"
/*-----------------------------------------type define------------------------------------------*/
/************************************************************************************************/
/**
* @defgroup SPI_Types SPI Types
* @brief SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><EFBFBD><EFBFBD>
* @{
*
*/
/************************************************************************************************/
/**
* @brief SPI<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<EFBFBD>嶨<EFBFBD><EFBFBD>
*/
typedef struct
{
uint32_t mode; /**< SPI<50><49><EFBFBD><EFBFBD>ģʽ
@arg SPI_MODE_SLAVE
@arg SPI_MODE_MASTER */
uint32_t baud_rate_prescaler; /**< SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ò<EFBFBD><C3B2><EFBFBD>
@arg SPI_BAUDRATEPRESCALER_2
@arg SPI_BAUDRATEPRESCALER_4 ...
@note <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><EFBFBD>ӻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
uint32_t clk_polarity; /**< SPIʱ<49>Ӽ<EFBFBD><D3BC><EFBFBD>
@arg SPI_POLARITY_LOW
@arg SPI_POLARITY_HIGH */
uint32_t clk_phase; /**< SPIʱ<49><CAB1><EFBFBD><EFBFBD>λ
@arg SPI_PHASE_1EDGE
@arg SPI_PHASE_2EDGE */
}std_spi_init_t;
/**
* @}
*/
/*--------------------------------------------define--------------------------------------------*/
/************************************************************************************************/
/**
* @defgroup SPI_Constants SPI Constants
* @brief SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>弰<EFBFBD>궨<EFBFBD><EFBFBD>
* @{
*/
/************************************************************************************************/
/* SPI <20><><EFBFBD><EFBFBD>ģʽ */
#define SPI_MODE_SLAVE (0x00000000U) /**< SPI<50>ӻ<EFBFBD>ģʽ */
#define SPI_MODE_MASTER SPI_CR1_MSTR /**< SPI<50><49><EFBFBD><EFBFBD>ģʽ */
/* SPI <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ò<EFBFBD><C3B2><EFBFBD> */
#define SPI_BAUDRATEPRESCALER_2 SPI_CR1_BR_PCLK_DIV_2 /**< SPI<50><49><EFBFBD><EFBFBD>ΪfPLCK/2 */
#define SPI_BAUDRATEPRESCALER_4 SPI_CR1_BR_PCLK_DIV_4 /**< SPI<50><49><EFBFBD><EFBFBD>ΪfPLCK/4 */
#define SPI_BAUDRATEPRESCALER_8 SPI_CR1_BR_PCLK_DIV_8 /**< SPI<50><49><EFBFBD><EFBFBD>ΪfPLCK/8 */
#define SPI_BAUDRATEPRESCALER_16 SPI_CR1_BR_PCLK_DIV_16 /**< SPI<50><49><EFBFBD><EFBFBD>ΪfPLCK/16 */
#define SPI_BAUDRATEPRESCALER_32 SPI_CR1_BR_PCLK_DIV_32 /**< SPI<50><49><EFBFBD><EFBFBD>ΪfPLCK/32 */
#define SPI_BAUDRATEPRESCALER_64 SPI_CR1_BR_PCLK_DIV_64 /**< SPI<50><49><EFBFBD><EFBFBD>ΪfPLCK/64 */
#define SPI_BAUDRATEPRESCALER_128 SPI_CR1_BR_PCLK_DIV_128 /**< SPI<50><49><EFBFBD><EFBFBD>ΪfPLCK/128 */
/* SPI ʱ<>Ӽ<EFBFBD><D3BC><EFBFBD> */
#define SPI_POLARITY_LOW (0x00000000U) /**< SPIʱ<49>ӿ<EFBFBD><D3BF><EFBFBD>Ϊ<EFBFBD><CEAA> */
#define SPI_POLARITY_HIGH SPI_CR1_CPOL /**< SPIʱ<49>ӿ<EFBFBD><D3BF><EFBFBD>Ϊ<EFBFBD><CEAA> */
/* SPI ʱ<><CAB1><EFBFBD><EFBFBD>λ */
#define SPI_PHASE_1EDGE (0x00000000U) /**< SPI<50><49><EFBFBD>ݲ<EFBFBD><DDB2><EFBFBD><EFBFBD>ڵ<EFBFBD>һ<EFBFBD><D2BB>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> */
#define SPI_PHASE_2EDGE SPI_CR1_CPHA /**< SPI<50><49><EFBFBD>ݲ<EFBFBD><DDB2><EFBFBD><EFBFBD>ڵڶ<DAB5><DAB6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> */
/* SPI <20><><EFBFBD>ݴ<EFBFBD>С<EFBFBD><D0A1> */
#define SPI_FIRSTBIT_MSB (0x00000000U) /**< SPI<50><49><EFBFBD><EFBFBD><EFBFBD>շ<EFBFBD>Ϊ<EFBFBD><CEAA>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> */
#define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST /**< SPI<50><49><EFBFBD><EFBFBD><EFBFBD>շ<EFBFBD>Ϊ<EFBFBD><CEAA>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> */
/* SPI NSS<53><53><EFBFBD><EFBFBD>״̬*/
#define SPI_NSS_OUTPUT_LOW (0x00000000U) /**< SPIƬѡ<C6AC>ź<EFBFBD><C5BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD>ƽ */
#define SPI_NSS_OUTPUT_HIGH SPI_CR2_NSSO /**< SPIƬѡ<C6AC>ź<EFBFBD><C5BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD>ƽ */
/* SPI <20>ж<EFBFBD><D0B6>¼<EFBFBD> */
#define SPI_INTERRUPT_TXFE SPI_CR1_TXFEIE /**< SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>ж<EFBFBD>ʹ<EFBFBD><CAB9> */
#define SPI_INTERRUPT_RXFNE SPI_CR1_RXFNEIE /**< SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD><EFBFBD>ǿ<EFBFBD><C7BF>ж<EFBFBD>ʹ<EFBFBD><CAB9> */
#define SPI_INTERRUPT_ERR SPI_CR1_ERRIE /**< SPI<50><49><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʹ<EFBFBD><CAB9> */
/* SPI Ӳ<><D3B2>״̬<D7B4><CCAC>Ϣ */
#define SPI_FLAG_TXFE SPI_ISR_TXFE /**< SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD><EFBFBD>ձ<EFBFBD>־ */
#define SPI_FLAG_RXFNE SPI_ISR_RXFNE /**< SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD><EFBFBD>ǿձ<C7BF>־ */
#define SPI_FLAG_BUSY SPI_ISR_BUSY /**< SPI<50><49><EFBFBD>ߴ<EFBFBD><DFB4><EFBFBD>״̬<D7B4><CCAC>־ */
#define SPI_FLAG_OVR SPI_ISR_OVR /**< SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ */
#define SPI_FLAG_MMF SPI_ISR_MMF /**< SPI<50><49><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>ͻ<EFBFBD><CDBB>־ */
/* SPI ״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ */
#define SPI_CLEAR_FLAG_OVR SPI_ICR_OVRCF /**< SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD> */
#define SPI_CLEAR_FLAG_MMF SPI_ICR_MMFCF /**< SPI<50><49><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>ͻ<EFBFBD><CDBB>־<EFBFBD><D6BE><EFBFBD><EFBFBD> */
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ */
#define SPI_FLUSH_SEND SPI_DATACLR_TXCLR /**< SPI<50><49><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD> */
#define SPI_FLUSH_RECEIVE SPI_DATACLR_RXCLR /**< SPI<50><49><EFBFBD>ս<EFBFBD><D5BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD> */
/**
* @}
*/
/*-------------------------------------------functions------------------------------------------*/
/************************************************************************************************/
/**
* @defgroup SPI_External_Functions SPI External Functions
* @brief SPI<EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><EFBFBD>
* @{
*
*/
/************************************************************************************************/
/**
* @brief ʹ<EFBFBD><EFBFBD>SPI
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_enable(SPI_t *spix)
{
spix->CR1 |= SPI_CR1_SPE;
}
/**
* @brief <EFBFBD><EFBFBD>ֹSPI
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_disable(SPI_t *spix)
{
spix->CR1 &= (~SPI_CR1_SPE);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param mode SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @arg SPI_MODE_SLAVE
* @arg SPI_MODE_MASTER
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_set_mode(SPI_t *spix, uint32_t mode)
{
MODIFY_REG(spix->CR1, SPI_CR1_MSTR, mode);
}
/**
* @brief <EFBFBD><EFBFBD>ȡSPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval uint32_t SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @arg SPI_MODE_SLAVE
* @arg SPI_MODE_MASTER
*/
__STATIC_INLINE uint32_t std_spi_get_mode(SPI_t *spix)
{
return (spix->CR1 & SPI_CR1_MSTR);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param baud_rate SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg SPI_BAUDRATEPRESCALER_2
* @arg SPI_BAUDRATEPRESCALER_4
* @arg ...
* @arg SPI_BAUDRATEPRESCALER_128
* @note <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><EFBFBD>ӻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_set_baud_rate(SPI_t *spix, uint32_t baud_rate)
{
MODIFY_REG(spix->CR1, SPI_CR1_BR, baud_rate);
}
/**
* @brief <EFBFBD><EFBFBD>ȡSPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval uint32_t SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg SPI_BAUDRATEPRESCALER_2
* @arg SPI_BAUDRATEPRESCALER_4
* @arg ...
* @arg SPI_BAUDRATEPRESCALER_128
*/
__STATIC_INLINE uint32_t std_spi_get_baud_rate(SPI_t *spix)
{
return (spix->CR1 & SPI_CR1_BR);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPIʱ<EFBFBD>Ӽ<EFBFBD><EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param polarity SPIʱ<EFBFBD>Ӽ<EFBFBD><EFBFBD><EFBFBD>
* @arg SPI_POLARITY_LOW
* @arg SPI_POLARITY_HIGH
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_set_polarity(SPI_t *spix, uint32_t polarity)
{
MODIFY_REG(spix->CR1, SPI_CR1_CPOL, polarity);
}
/**
* @brief <EFBFBD><EFBFBD>ȡSPIʱ<EFBFBD>Ӽ<EFBFBD><EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval uint32_t SPIʱ<EFBFBD>Ӽ<EFBFBD><EFBFBD><EFBFBD>
* @arg SPI_POLARITY_LOW
* @arg SPI_POLARITY_HIGH
*/
__STATIC_INLINE uint32_t std_spi_get_polarity(SPI_t *spix)
{
return (spix->CR1 & SPI_CR1_CPOL);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPIʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param phase SPIʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
* @arg SPI_PHASE_1EDGE
* @arg SPI_PHASE_2EDGE
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_set_phase(SPI_t *spix, uint32_t phase)
{
MODIFY_REG(spix->CR1, SPI_CR1_CPHA, phase);
}
/**
* @brief <EFBFBD><EFBFBD>ȡSPIʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval uint32_t SPIʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
* @arg SPI_PHASE_1EDGE
* @arg SPI_PHASE_2EDGE
*/
__STATIC_INLINE uint32_t std_spi_get_phase(SPI_t *spix)
{
return (spix->CR1 & SPI_CR1_CPHA);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPI<EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С<EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param first_bit SPI<EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С<EFBFBD><EFBFBD>
* @arg SPI_FIRSTBIT_MSB
* @arg SPI_FIRSTBIT_LSB
* @note <EFBFBD><EFBFBD><EFBFBD>ڽ<EFBFBD>ֹSPI<EFBFBD><EFBFBD>SPEΪ0<EFBFBD><EFBFBD>ʱ<EFBFBD>ſɶԴ<EFBFBD>λִ<EFBFBD><EFBFBD>д<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_set_first_bit(SPI_t *spix, uint32_t first_bit)
{
MODIFY_REG(spix->CR1, SPI_CR1_LSBFIRST, first_bit);
}
/**
* @brief <EFBFBD><EFBFBD>ȡSPI<EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С<EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval uint32_t SPI<EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С<EFBFBD><EFBFBD>
* @arg SPI_FIRSTBIT_MSB
* @arg SPI_FIRSTBIT_LSB
*/
__STATIC_INLINE uint32_t std_spi_get_first_bit(SPI_t *spix)
{
return (spix->CR1 & SPI_CR1_LSBFIRST);
}
/**
* @brief ʹ<EFBFBD><EFBFBD>NSS<EFBFBD><EFBFBD>Ƭѡ
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @note SPI_CR1_SSMλ<EFBFBD><EFBFBD><EFBFBD>ڴӻ<EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_nss_soft_chip_select_enable(SPI_t *spix)
{
spix->CR1 |= SPI_CR1_SSM;
}
/**
* @brief <EFBFBD><EFBFBD>ֹNSS<EFBFBD><EFBFBD>Ƭѡ
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @note SPI_CR1_SSMλ<EFBFBD><EFBFBD><EFBFBD>ڴӻ<EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_nss_soft_chip_select_disable(SPI_t *spix)
{
spix->CR1 &= (~SPI_CR1_SSM);
}
/**
* @brief ʹ<EFBFBD><EFBFBD>SPI NSS<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @note SPI_CR1_NSSOEλ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_nss_output_enable(SPI_t *spix)
{
spix->CR1 |= SPI_CR1_NSSOE;
}
/**
* @brief <EFBFBD><EFBFBD>ֹSPI NSS<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_nss_output_disable(SPI_t *spix)
{
spix->CR1 &= (~SPI_CR1_NSSOE);
}
/**
* @brief ʹ<EFBFBD><EFBFBD>SPI <EFBFBD>ж<EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param spi_interrupt SPI<EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD>Ϣ
* @arg SPI_INTERRUPT_TXFE
* @arg SPI_INTERRUPT_RXFNE
* @arg SPI_INTERRUPT_ERR
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_interrupt_enable(SPI_t *spix, uint32_t spi_interrupt)
{
spix->CR1 |= spi_interrupt;
}
/**
* @brief <EFBFBD><EFBFBD>ֹSPI <EFBFBD>ж<EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param spi_interrupt SPI<EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD>Ϣ
* @arg SPI_INTERRUPT_TXFE
* @arg SPI_INTERRUPT_RXFNE
* @arg SPI_INTERRUPT_ERR
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_interrupt_disable(SPI_t *spix, uint32_t spi_interrupt)
{
spix->CR1 &= (~spi_interrupt);
}
/**
* @brief <EFBFBD><EFBFBD>ȡSPI<EFBFBD>ж<EFBFBD>ʹ<EFBFBD><EFBFBD>״̬
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param spi_interrupt SPI<EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD>Ϣ
* @arg SPI_INTERRUPT_TXFE
* @arg SPI_INTERRUPT_RXFNE
* @arg SPI_INTERRUPT_ERR
* @retval bool <EFBFBD>ж<EFBFBD>ʹ<EFBFBD><EFBFBD>״̬
* @arg true <EFBFBD>ж<EFBFBD>ʹ<EFBFBD><EFBFBD>
* @arg false <EFBFBD>жϽ<EFBFBD>ֹ
*/
__STATIC_INLINE bool std_spi_get_interrupt_enable(SPI_t *spix, uint32_t spi_interrupt)
{
return ((spix->CR1 & (spi_interrupt)) == (spi_interrupt));
}
/**
* @brief ʹ<EFBFBD><EFBFBD>SPI DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_dma_tx_enable(SPI_t *spix)
{
spix->CR1 |= SPI_CR1_DMAT;
}
/**
* @brief <EFBFBD><EFBFBD>ֹSPI DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_dma_tx_disable(SPI_t *spix)
{
spix->CR1 &= (~SPI_CR1_DMAT);
}
/**
* @brief ʹ<EFBFBD><EFBFBD>SPI DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_dma_rx_enable(SPI_t *spix)
{
spix->CR1 |= SPI_CR1_DMAR;
}
/**
* @brief <EFBFBD><EFBFBD>ֹSPI DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_dma_rx_disable(SPI_t *spix)
{
spix->CR1 &= (~SPI_CR1_DMAR);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPI NSS<EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param nss_output NSS<EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
* @arg SPI_NSS_OUTPUT_LOW
* @arg SPI_NSS_OUTPUT_HIGH
* @note <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPEʹ<EFBFBD>ܵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_set_nss_output(SPI_t *spix, uint32_t nss_output)
{
MODIFY_REG(spix->CR2, SPI_CR2_NSSO, nss_output);
}
/**
* @brief <EFBFBD><EFBFBD>ȡSPI ״̬<EFBFBD><EFBFBD>Ϣ
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param flag SPI״̬
* @arg SPI_FLAG_TXFE
* @arg SPI_FLAG_RXFNE
* @arg SPI_FLAG_BUSY
* @arg SPI_FLAG_OVR
* @arg SPI_FLAG_MMF
* @retval bool SPI״̬
* true ״̬<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* false ״̬δ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
__STATIC_INLINE bool std_spi_get_flag(SPI_t *spix, uint32_t flag)
{
return ((spix->ISR & (flag)) == (flag));
}
/**
* @brief SPI <EFBFBD><EFBFBD>־<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param flag SPI<EFBFBD><EFBFBD>־
* @arg SPI_CLEAR_FLAG_OVR
* @arg SPI_CLEAR_FLAG_MMF
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_clear_flag(SPI_t *spix, uint32_t flag)
{
spix->ICR |= (flag);
}
/**
* @brief SPI <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval uint8_t: <EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD>ȡ<EFBFBD><EFBFBD>SPI<EFBFBD><EFBFBD><EFBFBD>ݼĴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
__STATIC_INLINE uint8_t std_spi_read_data(SPI_t *spix)
{
return (spix->DR);
}
/**
* @brief SPI д<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param send_data: д<EFBFBD><EFBFBD>SPI<EFBFBD><EFBFBD><EFBFBD>ݼĴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_write_data(SPI_t *spix, uint8_t send_data)
{
spix->DR = send_data;
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPI <EFBFBD><EFBFBD><EFBFBD>ݼĴ<EFBFBD><EFBFBD><EFBFBD>
* @param spix SPI<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param data_type <EFBFBD><EFBFBD><EFBFBD>ݼĴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg SPI_FLUSH_SEND
* @arg SPI_FLUSH_RECEIVE
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_spi_clear_data(SPI_t *spix, uint32_t data_type)
{
MODIFY_REG(spix->DATACLR, (SPI_FLUSH_SEND | SPI_FLUSH_RECEIVE), data_type);
}
void std_spi_init(SPI_t *spix, std_spi_init_t *spi_init_param);
void std_spi_deinit(SPI_t *spix);
void std_spi_struct_init(std_spi_init_t *spi_init_struct);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
/**
* @}
*/
/**
* @}
*/
#endif /* CIU32L051_STD_SPI_H */