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CIU32_L051_M307R
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CIU32_L051_M307R/Peripheral/CIU32L051_Lib/Include/ciu32l051_std_dma.h

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移植了RTThread和RTT打印，并完成了串口的DMA中断发送，和串口空闲中断+DMA接收，测试通过
2024-08-22 16:24:54 +08:00
/************************************************************************************************/
/**
* @file ciu32l051_std_dma.h
* @author MCU Ecosystem Development Team
* @brief DMA STD<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD>ṩDMA<EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>STD<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD><EFBFBD>塣
*
*
**************************************************************************************************
* @attention
* Copyright (c) CEC Huada Electronic Design Co.,Ltd. All rights reserved.
*
**************************************************************************************************
*/
/*<2A><><EFBFBD><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD><C4BC>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>*/
#ifndef CIU32L051_STD_DMA_H
#define CIU32L051_STD_DMA_H
/************************************************************************************************/
/**
* @addtogroup CIU32L051_STD_Driver
* @{
*/
/**
* @defgroup DMA DMA
* @brief ֱ<EFBFBD>Ӵ洢<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʿ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>STD<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @{
*/
/************************************************************************************************/
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------includes--------------------------------------------*/
#include "ciu32l051_std_common.h"
/*-----------------------------------------type define------------------------------------------*/
/************************************************************************************************/
/**
* @defgroup DMA_Types DMA Types
* @brief DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><EFBFBD><EFBFBD>
* @{
*
*/
/************************************************************************************************/
/**
* @brief DMA<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<EFBFBD>嶨<EFBFBD><EFBFBD>
*/
typedef struct
{
uint32_t dma_channel; /**< DMAͨ<41><CDA8>
@arg DMA_CHANNEL_0
@arg DMA_CHANNEL_1 */
uint32_t transfer_type; /**< DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD>Block<63><6B><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Burst<73><74><EFBFBD><EFBFBD>
@arg DMA_BLOCK_TRANSFER
@arg DMA_BURST_TRANSFER */
uint32_t dma_req_id; /**< DMA<4D><41><EFBFBD><EFBFBD>ԴID
@arg DMA_REQUEST_SOFTWARE
@arg DMA_REQUEST_ADC... */
uint32_t src_addr_inc; /**< DMAԴ<41><D4B4>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>ʹ<EFBFBD>ܻ<EFBFBD><DCBB><EFBFBD>ֹ
@arg DMA_SRC_INC_DISABLE
@arg DMA_SRC_INC_ENABLE */
uint32_t dst_addr_inc; /**< DMAĿ<41>ĵ<EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>ʹ<EFBFBD>ܻ<EFBFBD><DCBB><EFBFBD>ֹ
@arg DMA_DST_INC_DISABLE
@arg DMA_DST_INC_ENABLE */
uint32_t data_size; /**< DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݿ<EFBFBD><DDBF>ȣ<EFBFBD><C8A3>ֽڡ<D6BD><DAA1><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD>
@arg DMA_DATA_SIZE_BYTE
@arg DMA_DATA_SIZE_HALFWORD
@arg DMA_DATA_SIZE_WORD */
uint32_t mode; /**< DMA<4D><41><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>ѭ<EFBFBD><D1AD>ģʽ
@arg DMA_MODE_NORMAL
@arg DMA_MODE_CIRCULAR
@note <EFBFBD>洢<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>䷽<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊѭ<EFBFBD><EFBFBD>ģʽ */
} std_dma_init_t;
/**
* @brief DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<EFBFBD>嶨<EFBFBD><EFBFBD>
*/
typedef struct
{
uint32_t dma_channel; /**< DMAͨ<41><CDA8>
@arg DMA_CHANNEL_0
@arg DMA_CHANNEL_1 */
uint32_t src_addr; /**< DMA<4D><41><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4>ַ */
uint32_t dst_addr; /**< DMA<4D><41><EFBFBD><EFBFBD>Ŀ<EFBFBD>ĵ<EFBFBD>ַ */
uint32_t data_number; /**< DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
} std_dma_config_t;
/**
* @}
*/
/*--------------------------------------------define--------------------------------------------*/
/************************************************************************************************/
/**
* @defgroup DMA_Constants DMA Constants
* @brief DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>弰<EFBFBD>궨<EFBFBD><EFBFBD>
* @{
*/
/************************************************************************************************/
/* DMAͨ<41><CDA8> */
#define DMA_CHANNEL_0 (0x00U) /**< DMAͨ<41><CDA8>0 */
#define DMA_CHANNEL_1 (0x01U) /**< DMAͨ<41><CDA8>1 */
/* DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define DMA_BLOCK_TRANSFER (0x00000000U) /**< DMA BLOCK<43><4B><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define DMA_BURST_TRANSFER (DMA_CC_TYPE) /**< DMA BURST<53><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
/* DMAԴ<41><D4B4>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>ģʽ */
#define DMA_SRC_INC_DISABLE (0x00000000U) /**< Դ<><D4B4>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ */
#define DMA_SRC_INC_ENABLE (DMA_CC_SINC) /**< Դ<><D4B4>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9> */
/* DMAĿ<41>ĵ<EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>ģʽ */
#define DMA_DST_INC_DISABLE (0x00000000U) /**< Ŀ<>ĵ<EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ */
#define DMA_DST_INC_ENABLE (DMA_CC_DINC) /**< Ŀ<>ĵ<EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9> */
/* DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD> */
#define DMA_DATA_SIZE_BYTE (DMA_CC_SIZE_BYTE) /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD>ֽ<EFBFBD> */
#define DMA_DATA_SIZE_HALFWORD (DMA_CC_SIZE_HALFWORD) /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD> */
#define DMA_DATA_SIZE_WORD (DMA_CC_SIZE_WORD) /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA> */
/* DMAģʽ */
#define DMA_MODE_NORMAL (0x00000000U) /**< <20><><EFBFBD><EFBFBD>ģʽ */
#define DMA_MODE_CIRCULAR (DMA_CC_CIRC) /**< ѭ<><D1AD>ģʽ */
/* DMA<4D><41><EFBFBD><EFBFBD>ԴID */
#define DMA_REQUEST_SOFTWARE (0U) /**< DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define DMA_REQUEST_ADC (1U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪADC */
#define DMA_REQUEST_SPI1_RX (2U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪSPI1<49><31><EFBFBD><EFBFBD> */
#define DMA_REQUEST_SPI1_TX (2U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪSPI1<49><31><EFBFBD><EFBFBD> */
#define DMA_REQUEST_SPI2_RX (3U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪSPI2<49><32><EFBFBD><EFBFBD> */
#define DMA_REQUEST_SPI2_TX (3U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪSPI2<49><32><EFBFBD><EFBFBD> */
#define DMA_REQUEST_I2C1_RX (4U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪI2C1<43><31><EFBFBD><EFBFBD> */
#define DMA_REQUEST_I2C1_TX (4U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪI2C1<43><31><EFBFBD><EFBFBD> */
#define DMA_REQUEST_USART1_RX (6U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪUSART1<54><31><EFBFBD><EFBFBD> */
#define DMA_REQUEST_USART1_TX (6U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪUSART1<54><31><EFBFBD><EFBFBD> */
#define DMA_REQUEST_UART2_RX (7U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪUART2<54><32><EFBFBD><EFBFBD> */
#define DMA_REQUEST_UART2_TX (7U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪUART2<54><32><EFBFBD><EFBFBD> */
#define DMA_REQUEST_UART3_RX (8U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪUART3<54><33><EFBFBD><EFBFBD> */
#define DMA_REQUEST_UART3_TX (8U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪUART3<54><33><EFBFBD><EFBFBD> */
#define DMA_REQUEST_UART4_RX (9U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪUART4<54><34><EFBFBD><EFBFBD> */
#define DMA_REQUEST_UART4_TX (9U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪUART4<54><34><EFBFBD><EFBFBD> */
#define DMA_REQUEST_LPUART1_RX (10U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪLPUART1<54><31><EFBFBD><EFBFBD> */
#define DMA_REQUEST_LPUART1_TX (10U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪLPUART1<54><31><EFBFBD><EFBFBD> */
#define DMA_REQUEST_LPUART2_RX (11U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪLPUART2<54><32><EFBFBD><EFBFBD> */
#define DMA_REQUEST_LPUART2_TX (11U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪLPUART2<54><32><EFBFBD><EFBFBD> */
#define DMA_REQUEST_TIM3_CC1 (15U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM3ͨ<33><CDA8>1<EFBFBD>Ƚ<EFBFBD>/ƥ<><C6A5> */
#define DMA_REQUEST_TIM3_CC2 (15U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM3ͨ<33><CDA8>2<EFBFBD>Ƚ<EFBFBD>/ƥ<><C6A5> */
#define DMA_REQUEST_TIM3_CC3 (16U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM3ͨ<33><CDA8>3<EFBFBD>Ƚ<EFBFBD>/ƥ<><C6A5> */
#define DMA_REQUEST_TIM3_CC4 (16U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM3ͨ<33><CDA8>4<EFBFBD>Ƚ<EFBFBD>/ƥ<><C6A5> */
#define DMA_REQUEST_TIM3_TRIG (17U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM3<4D><33><EFBFBD><EFBFBD> */
#define DMA_REQUEST_TIM3_UP (17U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM3<4D><33><EFBFBD><EFBFBD> */
#define DMA_REQUEST_TIM4_CC1 (18U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM4ͨ<34><CDA8>1<EFBFBD>Ƚ<EFBFBD>/ƥ<><C6A5> */
#define DMA_REQUEST_TIM4_CC2 (18U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM4ͨ<34><CDA8>2<EFBFBD>Ƚ<EFBFBD>/ƥ<><C6A5> */
#define DMA_REQUEST_TIM4_CC3 (19U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM4ͨ<34><CDA8>3<EFBFBD>Ƚ<EFBFBD>/ƥ<><C6A5> */
#define DMA_REQUEST_TIM4_CC4 (19U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM4ͨ<34><CDA8>4<EFBFBD>Ƚ<EFBFBD>/ƥ<><C6A5> */
#define DMA_REQUEST_TIM4_TRIG (20U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM4<4D><34><EFBFBD><EFBFBD> */
#define DMA_REQUEST_TIM4_UP (20U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM4<4D><34><EFBFBD><EFBFBD> */
#define DMA_REQUEST_TIM5_CC1 (21U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM5ͨ<35><CDA8>1<EFBFBD>Ƚ<EFBFBD>/ƥ<><C6A5> */
#define DMA_REQUEST_TIM5_CC2 (21U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM5ͨ<35><CDA8>2<EFBFBD>Ƚ<EFBFBD>/ƥ<><C6A5> */
#define DMA_REQUEST_TIM5_CC3 (22U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM5ͨ<35><CDA8>3<EFBFBD>Ƚ<EFBFBD>/ƥ<><C6A5> */
#define DMA_REQUEST_TIM5_CC4 (22U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM5ͨ<35><CDA8>4<EFBFBD>Ƚ<EFBFBD>/ƥ<><C6A5> */
#define DMA_REQUEST_TIM5_TRIG (23U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM5<4D><35><EFBFBD><EFBFBD> */
#define DMA_REQUEST_TIM5_UP (23U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM5<4D><35><EFBFBD><EFBFBD> */
#define DMA_REQUEST_TIM8_UP (24U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪTIM8<4D><38><EFBFBD><EFBFBD> */
#define DMA_REQUEST_AES_IN (26U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪAES<45><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define DMA_REQUEST_AES_OUT (26U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪAES<45><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define DMA_REQUEST_LPTIM1_CMPM (27U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪLPTIM1<4D>Ƚ<EFBFBD>/ƥ<><C6A5> */
#define DMA_REQUEST_LPTIM1_ARRM (27U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪLPTIM1<4D>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD> */
#define DMA_REQUEST_LPTIM2_CMPM (28U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪLPTIM2<4D>Ƚ<EFBFBD>/ƥ<><C6A5> */
#define DMA_REQUEST_LPTIM2_ARRM (28U) /**< DMA<4D><41><EFBFBD><EFBFBD>ΪLPTIM2<4D>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD> */
/* DMA<4D>ж<EFBFBD>״̬ */
#define DMA_FLAG_G0 (DMA_ISR_G0) /**< DMAͨ<41><CDA8>0ȫ<30><C8AB>״̬ */
#define DMA_FLAG_TF0 (DMA_ISR_TF0) /**< DMAͨ<41><CDA8>0<EFBFBD><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ */
#define DMA_FLAG_TH0 (DMA_ISR_TH0) /**< DMAͨ<41><CDA8>0<EFBFBD><30><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬ */
#define DMA_FLAG_TE0 (DMA_ISR_TE0) /**< DMAͨ<41><CDA8>0<EFBFBD><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ */
#define DMA_FLAG_G1 (DMA_ISR_G1) /**< DMAͨ<41><CDA8>1ȫ<31><C8AB>״̬ */
#define DMA_FLAG_TF1 (DMA_ISR_TF1) /**< DMAͨ<41><CDA8>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ */
#define DMA_FLAG_TH1 (DMA_ISR_TH1) /**< DMAͨ<41><CDA8>1<EFBFBD><31><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬ */
#define DMA_FLAG_TE1 (DMA_ISR_TE1) /**< DMAͨ<41><CDA8>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ */
/* DMA<4D>ж<EFBFBD>Դ */
#define DMA_INTERRUPT_TF (DMA_CC_TFIE) /**< DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD> */
#define DMA_INTERRUPT_TH (DMA_CC_THIE) /**< DMA<4D><41><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>ж<EFBFBD> */
#define DMA_INTERRUPT_TE (DMA_CC_TEIE) /**< DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD> */
/* DMA<4D>ж<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
#define DMA_CLEAR_G0 (DMA_ICR_GCF0) /**< DMAͨ<41><CDA8>0ȫ<30><C8AB>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
#define DMA_CLEAR_TF0 (DMA_ICR_TFCF0) /**< DMAͨ<41><CDA8>0<EFBFBD><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
#define DMA_CLEAR_TH0 (DMA_ICR_THCF0) /**< DMAͨ<41><CDA8>0<EFBFBD><30><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
#define DMA_CLEAR_TE0 (DMA_ICR_TECF0) /**< DMAͨ<41><CDA8>0<EFBFBD><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
#define DMA_CLEAR_G1 (DMA_ICR_GCF1) /**< DMAͨ<41><CDA8>1ȫ<31><C8AB>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
#define DMA_CLEAR_TF1 (DMA_ICR_TFCF1) /**< DMAͨ<41><CDA8>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
#define DMA_CLEAR_TH1 (DMA_ICR_THCF1) /**< DMAͨ<41><CDA8>1<EFBFBD><31><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
#define DMA_CLEAR_TE1 (DMA_ICR_TECF1) /**< DMAͨ<41><CDA8>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
/**
* @}
*/
/*-------------------------------------------functions------------------------------------------*/
/************************************************************************************************/
/**
* @defgroup DMA_External_Functions DMA External Functions
* @brief DMA<EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><EFBFBD>
* @{
*
*/
/************************************************************************************************/
/**
* @brief ʹ<EFBFBD><EFBFBD>DMAͨ<EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_enable(uint32_t channel)
{
(&(DMA->channel[channel]))->CC |= (DMA_CC_EN);
}
/**
* @brief <EFBFBD><EFBFBD>ֹDMAͨ<EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_disable(uint32_t channel)
{
(&(DMA->channel[channel]))->CC &= (~DMA_CC_EN);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @param transfer_type DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg DMA_BLOCK_TRANSFER
* @arg DMA_BURST_TRANSFER
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_transfer_type_config(uint32_t channel, uint32_t transfer_type)
{
MODIFY_REG((&(DMA->channel[channel]))->CC, DMA_CC_TYPE, transfer_type);
}
/**
* @brief <EFBFBD><EFBFBD>ȡDMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval uint32_t DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg DMA_BLOCK_TRANSFER
* @arg DMA_BURST_TRANSFER
*/
__STATIC_INLINE uint32_t std_dma_get_transfer_type(uint32_t channel)
{
return ((&(DMA->channel[channel]))->CC & DMA_CC_TYPE);
}
/**
* @brief ʹ<EFBFBD><EFBFBD>DMAԴ<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_src_addr_inc_enable(uint32_t channel)
{
(&(DMA->channel[channel]))->CC |= (DMA_CC_SINC);
}
/**
* @brief <EFBFBD><EFBFBD>ֹDMAԴ<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_src_addr_inc_disable(uint32_t channel)
{
(&(DMA->channel[channel]))->CC &= (~DMA_CC_SINC);
}
/**
* @brief ʹ<EFBFBD><EFBFBD>DMAĿ<EFBFBD>ĵ<EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_dst_addr_inc_enable(uint32_t channel)
{
(&(DMA->channel[channel]))->CC |= (DMA_CC_DINC);
}
/**
* @brief <EFBFBD><EFBFBD>ֹDMAĿ<EFBFBD>ĵ<EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_dst_addr_inc_disable(uint32_t channel)
{
(&(DMA->channel[channel]))->CC &= (~DMA_CC_DINC);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С<EFBFBD><EFBFBD>Ϊ<EFBFBD>ֽڡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @param data_size DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С
* @arg DMA_DATA_SIZE_BYTE
* @arg DMA_DATA_SIZE_HALFWORD
* @arg DMA_DATA_SIZE_WORD
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_set_transfer_data_size(uint32_t channel, uint32_t data_size)
{
MODIFY_REG((&(DMA->channel[channel]))->CC, (DMA_CC_SIZE), (data_size & DMA_CC_SIZE));
}
/**
* @brief <EFBFBD><EFBFBD>ȡDMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С<EFBFBD><EFBFBD>Ϊ<EFBFBD>ֽڡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval uint32_t DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С
* @arg DMA_DATA_SIZE_BYTE
* @arg DMA_DATA_SIZE_HALFWORD
* @arg DMA_DATA_SIZE_WORD
*/
__STATIC_INLINE uint32_t std_dma_get_transfer_data_size(uint32_t channel)
{
return ((&(DMA->channel[channel]))->CC & (DMA_CC_SIZE));
}
/**
* @brief ʹ<EFBFBD><EFBFBD>DMAѭ<EFBFBD><EFBFBD>ģʽ
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_circular_mode_enable(uint32_t channel)
{
(&(DMA->channel[channel]))->CC |= DMA_MODE_CIRCULAR;
}
/**
* @brief <EFBFBD><EFBFBD>ֹDMAѭ<EFBFBD><EFBFBD>ģʽ
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_circular_mode_disable(uint32_t channel)
{
(&(DMA->channel[channel]))->CC &= (~DMA_MODE_CIRCULAR);
}
/**
* @brief <EFBFBD><EFBFBD>ȡDMAѭ<EFBFBD><EFBFBD>ģʽʹ<EFBFBD><EFBFBD>״̬
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval bool DMAѭ<EFBFBD><EFBFBD>ģʽʹ<EFBFBD><EFBFBD>״̬
* @arg true DMAѭ<EFBFBD><EFBFBD>ģʽʹ<EFBFBD><EFBFBD>
* @arg false DMAѭ<EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD>ֹ
*/
__STATIC_INLINE bool std_dma_get_circular_mode_status(uint32_t channel)
{
return (((&(DMA->channel[channel]))->CC & DMA_MODE_CIRCULAR) == DMA_MODE_CIRCULAR);
}
/**
* @brief ʹ<EFBFBD><EFBFBD>DMA<EFBFBD>ж<EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @param dma_interrupt DMA<EFBFBD>жϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
* @arg DMA_INTERRUPT_TE
* @arg DMA_INTERRUPT_TF
* @arg DMA_INTERRUPT_TH
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_interrupt_enable(uint32_t channel, uint32_t dma_interrupt)
{
(&(DMA->channel[channel]))->CC |= (dma_interrupt);
}
/**
* @brief <EFBFBD><EFBFBD>ֹDMA<EFBFBD>ж<EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @param dma_interrupt DMA<EFBFBD>жϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
* @arg DMA_INTERRUPT_TE
* @arg DMA_INTERRUPT_TF
* @arg DMA_INTERRUPT_TH
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_interrupt_disable(uint32_t channel, uint32_t dma_interrupt)
{
(&(DMA->channel[channel]))->CC &= (~dma_interrupt);
}
/**
* @brief <EFBFBD><EFBFBD>ȡDMA<EFBFBD>ж<EFBFBD>ʹ<EFBFBD><EFBFBD>״̬
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @param dma_interrupt DMA<EFBFBD>жϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
* @arg DMA_INTERRUPT_TE
* @arg DMA_INTERRUPT_TF
* @arg DMA_INTERRUPT_TH
* @retval bool DMA<EFBFBD>ж<EFBFBD>ʹ<EFBFBD><EFBFBD>״̬
* @arg true DMA<EFBFBD>ж<EFBFBD>ʹ<EFBFBD><EFBFBD>
* @arg false DMA<EFBFBD>жϽ<EFBFBD>ֹ
*/
__STATIC_INLINE bool std_dma_get_interrupt_enable(uint32_t channel, uint32_t dma_interrupt)
{
return (((&(DMA->channel[channel]))->CC & (dma_interrupt)) == (dma_interrupt));
}
/**
* @brief <EFBFBD><EFBFBD>ȡDMA<EFBFBD><EFBFBD>־λ״̬
* @param flag DMA״̬,<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><EFBFBD><EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
* @arg DMA_FLAG_G0
* @arg DMA_FLAG_TF0
* @arg DMA_FLAG_TH0
* @arg DMA_FLAG_TE0
* @arg DMA_FLAG_G1
* @arg DMA_FLAG_TF1
* @arg DMA_FLAG_TH1
* @arg DMA_FLAG_TE1
* @retval bool DMA<EFBFBD><EFBFBD>־λ״̬
* @arg true DMA<EFBFBD><EFBFBD>־λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg false DMA<EFBFBD><EFBFBD>־λδ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
__STATIC_INLINE bool std_dma_get_flag(uint32_t flag)
{
return ((DMA->ISR & (flag)) == (flag));
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD>־λ
* @param flag DMA״̬,<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><EFBFBD><EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD>жϡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
* @arg DMA_CLEAR_G0
* @arg DMA_CLEAR_TF0
* @arg DMA_CLEAR_TH0
* @arg DMA_CLEAR_TE0
* @arg DMA_CLEAR_G1
* @arg DMA_CLEAR_TF1
* @arg DMA_CLEAR_TH1
* @arg DMA_CLEAR_TE1
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_clear_flag(uint32_t flag)
{
DMA->ICR |= (flag);
}
/**
* @brief DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @param req_id DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>Դ
* @arg DMA_REQUEST_SOFTWARE
* @arg DMA_REQUEST_ADC
* @arg ...
* @arg DMA_REQUEST_LPTIM2_ARRM
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_set_req_id(uint32_t channel, uint32_t req_id)
{
MODIFY_REG((&(DMA->channel[channel]))->CC, (DMA_CC_REQ_ID), (req_id << DMA_CC_REQ_ID_POS));
}
/**
* @brief <EFBFBD><EFBFBD>ȡDMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval uint32_t DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>Դ
* @arg DMA_REQUEST_SOFTWARE
* @arg DMA_REQUEST_ADC
* @arg ...
* @arg DMA_REQUEST_LPTIM2_ARRM
*/
__STATIC_INLINE uint32_t std_dma_get_req_id(uint32_t channel)
{
return (((&(DMA->channel[channel]))->CC & (DMA_CC_REQ_ID)) >> DMA_CC_REQ_ID_POS);
}
/**
* @brief DMAͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʋ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel dmaͨ<EFBFBD><EFBFBD>
* @param config_value DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg DMA_MODE_NORMAL or DMA_MODE_CIRCULAR
* @arg DMA_BLOCK_TRANSFER or DMA_BURST_TRANSFER
* @arg DMA_DATA_SIZE_BYTE or DMA_DATA_SIZE_HALFWORD or DMA_DATA_SIZE_WORD
* @arg DMA_SRC_INC_DISABLE or DMA_SRC_INC_ENABLE
* @arg DMA_DST_INC_DISABLE or DMA_DST_INC_ENABLE
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_channel_config(uint32_t channel, uint32_t config_value)
{
MODIFY_REG((&(DMA->channel[channel]))->CC, (DMA_CC_CIRC | DMA_CC_TYPE | DMA_CC_SIZE | DMA_CC_SINC | DMA_CC_DINC), (config_value));
}
/**
* @brief <EFBFBD><EFBFBD>λDMAͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_reset_control(uint32_t channel)
{
(&(DMA->channel[channel]))->CC &= (~DMA_CC_EN);
(&(DMA->channel[channel]))->CC = 0U;
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMAԴ<EFBFBD><EFBFBD>ַ
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @param src_addr DMAԴ<EFBFBD><EFBFBD>ַ
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_set_src_address(uint32_t channel, uint32_t src_addr)
{
(&(DMA->channel[channel]))->CSAR = src_addr;
}
/**
* @brief <EFBFBD><EFBFBD>ȡDMAԴ<EFBFBD><EFBFBD>ַ
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval uint32_t DMAԴ<EFBFBD><EFBFBD>ַ
*/
__STATIC_INLINE uint32_t std_dma_get_src_address(uint32_t channel)
{
return ((&(DMA->channel[channel]))->CSAR);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMAĿ<EFBFBD>ĵ<EFBFBD>ַ
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @param dst_addr DMAĿ<EFBFBD>ĵ<EFBFBD>ַ
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_set_dst_address(uint32_t channel, uint32_t dst_addr)
{
(&(DMA->channel[channel]))->CDAR = dst_addr;
}
/**
* @brief <EFBFBD><EFBFBD>ȡDMAĿ<EFBFBD>ĵ<EFBFBD>ַ
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval uint32_t DMAĿ<EFBFBD>ĵ<EFBFBD>ַ
*/
__STATIC_INLINE uint32_t std_dma_get_dts_address(uint32_t channel)
{
return ((&(DMA->channel[channel]))->CDAR);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @param data_number <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_dma_set_transfer_data_number(uint32_t channel, uint32_t data_number)
{
(&(DMA->channel[channel]))->CNDTR = data_number;
}
/**
* @brief <EFBFBD><EFBFBD>ȡDMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel DMAͨ<EFBFBD><EFBFBD>
* @arg DMA_CHANNEL_0
* @arg DMA_CHANNEL_1
* @retval uint32_t DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
__STATIC_INLINE uint32_t std_dma_get_transfer_data_number(uint32_t channel)
{
return ((&(DMA->channel[channel]))->CNDTR);
}
void std_dma_init(std_dma_init_t *dma_init_param);
void std_dma_deinit(std_dma_init_t *dma_init_param);
void std_dma_struct_init(std_dma_init_t *dma_init_struct);
void std_dma_start_transmit(std_dma_config_t *dma_config);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
/**
* @}
*/
/**
* @}
*/
#endif /* CIU32L051_STD_DMA_H */