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CIU32_L051_M307R
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CIU32_L051_M307R/Peripheral/CIU32L051_Lib/Include/ciu32l051_std_syscfg.h

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移植了RTThread和RTT打印，并完成了串口的DMA中断发送，和串口空闲中断+DMA接收，测试通过
2024-08-22 16:24:54 +08:00
/************************************************************************************************/
/**
* @file ciu32l051_std_syscfg.h
* @author MCU Ecosystem Development Team
* @brief SYSCFG STD<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD>ṩSYSCFG<EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>STD<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD><EFBFBD>塣
*
*
**************************************************************************************************
* @attention
* Copyright (c) CEC Huada Electronic Design Co.,Ltd. All rights reserved.
*
**************************************************************************************************
*/
/* <20><><EFBFBD><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD><C4BC>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD> */
#ifndef CIU32L051_STD_SYSCFG_H
#define CIU32L051_STD_SYSCFG_H
/************************************************************************************************/
/**
* @addtogroup CIU32L051_STD_Driver
* @{
*/
/**
* @defgroup SYSCFG SYSCFG
* @brief ϵͳ<EFBFBD><EFBFBD><EFBFBD>ÿ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>STD<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @{
*
*/
/************************************************************************************************/
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------includes--------------------------------------------------*/
#include "ciu32l051_std_common.h"
/*-------------------------------------define---------------------------------------------------*/
/************************************************************************************************/
/**
* @defgroup SYSCFG_Constants SYSCFG Constants
* @brief SYSCFG<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>弰<EFBFBD>궨<EFBFBD><EFBFBD>
* @{
*
*/
/************************************************************************************************/
/* IRTIM<49><4D><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>ѡ<EFBFBD><D1A1> */
#define SYSCFG_IRMODE_TIM5_OC1 SYSCFG_CR_IR_MODE_TIM5_OC1 /**< <20><><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>Դ<EFBFBD><D4B4>TIM5_OC1 */
#define SYSCFG_IRMODE_USART1_TX SYSCFG_CR_IR_MODE_USART1_TX /**< <20><><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>Դ<EFBFBD><D4B4>USART1_TX */
#define SYSCFG_IRMODE_UART4_TX SYSCFG_CR_IR_MODE_UART4_TX /**< <20><><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>Դ<EFBFBD><D4B4>UART4_TX */
/* IR_OUT<55><54><EFBFBD><EFBFBD><EFBFBD>źż<C5BA><C5BC><EFBFBD>ѡ<EFBFBD><D1A1> */
#define SYSCFG_IRPOLARITY_DIRECT (0x00000000U) /**< IRTIM <20><><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD> */
#define SYSCFG_IRPOLARITY_INVERSE SYSCFG_CR_IR_POL /**< IRTIM <20><><EFBFBD><EFBFBD><EFBFBD>źŷ<C5BA><C5B7><EFBFBD> */
/* <20>洢<EFBFBD><E6B4A2>ӳ<EFBFBD><D3B3>ѡ<EFBFBD><D1A1>λ */
#define SYSCFG_MEM_MODE_USER_FLASH SYSCFG_CR_MEM_MODE_USER_FLASH /**< <20><>User flashӳ<68>䵽<EFBFBD><E4B5BD>ַ0x0000 0000 */
#define SYSCFG_MEM_MODE_SYS_MEM SYSCFG_CR_MEM_MODE_SYS_MEM /**< <20><>System memoryӳ<79>䵽<EFBFBD><E4B5BD>ַ0x0000 0000 */
#define SYSCFG_MEM_MODE_SRAM SYSCFG_CR_MEM_MODE_SRAM /**< <20><>SRAMӳ<4D>䵽<EFBFBD><E4B5BD>ַ0x0000 0000 */
/* 6bit DAC<41><43><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD><CEBF><EFBFBD>ѹԴ */
#define SYSCFG_6BIT_DAC_VREFBUF (0x00000000U) /**< ѡ<><D1A1>VREFBUF<55><46>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѹԴ */
#define SYSCFG_6BIT_DAC_VREFP (0x00000000U) /**< ѡ<><D1A1>VREF+<2B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѹԴ */
#define SYSCFG_6BIT_DAC_VDDA SYSCFG_CR_6BIT_DAC_REF /**< ѡ<><D1A1><EFBFBD>ڲ<EFBFBD>VDDA<44><41>ѹ<EFBFBD><D1B9>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѹԴ */
/* 6bit DAC<41><43><EFBFBD><EFBFBD><EFBFBD>ȶ<EFBFBD>ʱ<EFBFBD><CAB1> */
#define SYSCFG_6BIT_DAC_EN_DELAY (16U) /**< 6bit DAC<41><43><EFBFBD><EFBFBD><EFBFBD>ȶ<EFBFBD>ʱ<EFBFBD><CAB1> */
/* PVD<56><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ */
#define SYSCFG_PVD_LOCK_ENABLE SYSCFG_SECCR_PVD_LOCK /**< д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PMU_CR2<52>Ĵ<EFBFBD><C4B4><EFBFBD> */
/**
* @}
*/
/*-------------------------------------------functions------------------------------------------*/
/************************************************************************************************/
/**
* @defgroup SYSCFG_External_Functions SYSCFG External Functions
* @brief SYSCFG<EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><EFBFBD>
* @{
*
*/
/************************************************************************************************/
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>IRTIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>Դ
* @param ir_source <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>Դѡ<EFBFBD><EFBFBD>
* @arg SYSCFG_IRMODE_TIM5_OC1<EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>ԴΪTIM5<EFBFBD><EFBFBD>0C1
* @arg SYSCFG_IRMODE_USART1_TX<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>ԴΪUSART1
* @arg SYSCFG_IRMODE_UART4_TX<EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>ԴΪUART4
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_syscfg_set_ir_signal_source(uint32_t ir_source)
{
MODIFY_REG(SYSCFG->CR, SYSCFG_CR_IR_MODE, ir_source);
}
/**
* @brief <EFBFBD><EFBFBD>ȡIRTIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>Դ
* @retval uint32_t <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>Դ
* @arg SYSCFG_IRMODE_TIM5_OC1<EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>ԴΪTIM5<EFBFBD><EFBFBD>0C1
* @arg SYSCFG_IRMODE_USART1_TX<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>ԴΪUSART1
* @arg SYSCFG_IRMODE_UART4_TX<EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>ԴΪUART4
*/
__STATIC_INLINE uint32_t std_syscfg_get_ir_signal_source(void)
{
return(SYSCFG->CR & SYSCFG_CR_IR_MODE);
}
/**
* @brief IR_OUT<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>źż<EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD>
* @param irpolarity <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>źż<EFBFBD><EFBFBD><EFBFBD>
* @arg SYSCFG_IRPOLARITY_DIRECT: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>δ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg SYSCFG_IRPOLARITY_INVERSE: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>źŷ<EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_syscfg_set_ir_polarity(uint32_t irpolarity)
{
MODIFY_REG(SYSCFG->CR, SYSCFG_CR_IR_POL, irpolarity);
}
/**
* @brief <EFBFBD><EFBFBD>ȡIR_OUT<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>źż<EFBFBD><EFBFBD><EFBFBD>״̬
* @retval bool <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʽ<EFBFBD><EFBFBD><EFBFBD>жϽ<EFBFBD><EFBFBD><EFBFBD>
* @arg true<EFBFBD><EFBFBD> <EFBFBD><EFBFBD>ʾIRTIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>źŷ<EFBFBD><EFBFBD><EFBFBD>
* @arg false<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾIRTIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>δ<EFBFBD>෴
*/
__STATIC_INLINE bool std_syscfg_get_ir_polarity(void)
{
return((SYSCFG->CR & SYSCFG_CR_IR_POL) == SYSCFG_CR_IR_POL);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD>ô洢<EFBFBD><EFBFBD>ӳ<EFBFBD><EFBFBD>
* @param memory_mapping <EFBFBD>洢<EFBFBD><EFBFBD>ӳ<EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD>
* @arg SYSCFG_MEM_MODE_USER_FLASH<EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><EFBFBD>ӳ<EFBFBD>䵽USER FLASH
* @arg SYSCFG_MEM_MODE_SYS_MEM<EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><EFBFBD>ӳ<EFBFBD>䵽SYSTEM MEMORY
* @arg SYSCFG_MEM_MODE_SRAM<EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><EFBFBD>ӳ<EFBFBD>䵽SRAM
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_syscfg_set_memory_mapping(uint32_t memory_mapping)
{
MODIFY_REG(SYSCFG->CR, SYSCFG_CR_MEM_MODE, memory_mapping);
}
/**
* @brief <EFBFBD><EFBFBD>ȡ<EFBFBD>洢<EFBFBD><EFBFBD>ӳ<EFBFBD><EFBFBD>
* @retval uint32_t <EFBFBD>洢<EFBFBD><EFBFBD>ӳ<EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD>
* @arg SYSCFG_MEM_MODE_USER_FLASH<EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><EFBFBD>ӳ<EFBFBD>䵽USER FLASH
* @arg SYSCFG_MEM_MODE_SYS_MEM<EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><EFBFBD>ӳ<EFBFBD>䵽SYSTEM MEMORY
* @arg SYSCFG_MEM_MODE_SRAM<EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><EFBFBD>ӳ<EFBFBD>䵽SRAM
*/
__STATIC_INLINE uint32_t std_syscfg_get_memory_mapping(void)
{
return(SYSCFG->CR & SYSCFG_CR_MEM_MODE);
}
/**
* @brief ʹ<EFBFBD><EFBFBD>6bit DAC
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_syscfg_6bit_dac_enable(void)
{
SYSCFG->CR |= SYSCFG_CR_6BIT_DAC_EN;
}
/**
* @brief <EFBFBD><EFBFBD>ֹ6bit DAC
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_syscfg_6bit_dac_disable(void)
{
SYSCFG->CR &= (~SYSCFG_CR_6BIT_DAC_EN);
}
/**
* @brief <EFBFBD><EFBFBD>ȡ6bit DACʹ<EFBFBD><EFBFBD>״̬
* @retval bool <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʽ<EFBFBD><EFBFBD><EFBFBD>жϽ<EFBFBD><EFBFBD><EFBFBD>
* @arg true<EFBFBD><EFBFBD> <EFBFBD><EFBFBD>ʾʹ<EFBFBD><EFBFBD>6bit DAC
* @arg false<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾδʹ<EFBFBD><EFBFBD>6bit DAC
*/
__STATIC_INLINE bool std_syscfg_get_6bit_dac_enable(void)
{
return((SYSCFG->CR & SYSCFG_CR_6BIT_DAC_EN) == SYSCFG_CR_6BIT_DAC_EN);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>6bit DAC<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD><EFBFBD><EFBFBD>ѹԴ<EFBFBD><EFBFBD>ѹ
* @param divide_voltage <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD><EFBFBD><EFBFBD>ѹԴ<EFBFBD><EFBFBD>ѹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΧΪ<EFBFBD><EFBFBD>0x00-0x3F
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_syscfg_set_6bit_dac_divide_voltage (uint32_t divide_voltage)
{
MODIFY_REG(SYSCFG->CR, SYSCFG_CR_6BIT_DAC_DIV, divide_voltage << SYSCFG_CR_6BIT_DAC_DIV_POS);
}
/**
* @brief <EFBFBD><EFBFBD>ȡ6bit DAC<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD><EFBFBD><EFBFBD>ѹԴ<EFBFBD><EFBFBD>ѹ
* @retval uint32_t <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD><EFBFBD><EFBFBD>ѹԴ<EFBFBD><EFBFBD>ѹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΧΪ<EFBFBD><EFBFBD>0x00-0x3F
*/
__STATIC_INLINE uint32_t std_syscfg_get_6bit_dac_divide_voltage (void)
{
return((SYSCFG->CR & SYSCFG_CR_6BIT_DAC_DIV) >> SYSCFG_CR_6BIT_DAC_DIV_POS);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>6bit DAC<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD><EFBFBD><EFBFBD>ѹԴ
* @param source <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD><EFBFBD><EFBFBD>ѹԴѡ<EFBFBD><EFBFBD>
* @arg SYSCFG_6BIT_DAC_VREFBUF: ѡ<EFBFBD><EFBFBD>VREFBUF<EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѹԴ
* @arg SYSCFG_6BIT_DAC_VREFP: ѡ<EFBFBD><EFBFBD>VREF+<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѹԴ
* @arg SYSCFG_6BIT_DAC_VDDA: ѡ<EFBFBD><EFBFBD>VDDA<EFBFBD><EFBFBD>ѹ
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_syscfg_set_6bit_dac_reference_voltage(uint32_t source)
{
MODIFY_REG(SYSCFG->CR, SYSCFG_CR_6BIT_DAC_REF, source);
}
/**
* @brief <EFBFBD><EFBFBD>ȡ6bit DAC<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD><EFBFBD><EFBFBD>ѹԴ
* @retval uint32_t <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD><EFBFBD><EFBFBD>ѹԴѡ<EFBFBD><EFBFBD>
* @arg SYSCFG_6BIT_DAC_VREFBUF: ѡ<EFBFBD><EFBFBD>VREFBUF<EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѹԴ
* @arg SYSCFG_6BIT_DAC_VREFP: ѡ<EFBFBD><EFBFBD>VREF+<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѹԴ
* @arg SYSCFG_6BIT_DAC_VDDA: ѡ<EFBFBD><EFBFBD>VDDA<EFBFBD><EFBFBD>ѹ
*/
__STATIC_INLINE uint32_t std_syscfg_get_6bit_dac_reference_voltage(void)
{
return(SYSCFG->CR & SYSCFG_CR_6BIT_DAC_REF);
}
/**
* @brief ʹ<EFBFBD><EFBFBD>PVD<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_syscfg_pvd_lock_enable(void)
{
SYSCFG->SECCR |= SYSCFG_SECCR_PVD_LOCK;
}
/**
* @}
*/
#ifdef __cplusplus
}
#endif
/**
* @}
*/
/**
* @}
*/
#endif /* CIU32L051_STD_SYSCFG_H */