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CIU32_L051_M307R
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CIU32_L051_M307R/Peripheral/CIU32L051_Lib/Include/ciu32l051_std_tim.h

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移植了RTThread和RTT打印，并完成了串口的DMA中断发送，和串口空闲中断+DMA接收，测试通过
2024-08-22 16:24:54 +08:00
/************************************************************************************************/
/**
* @file ciu32l051_std_tim.h
* @author MCU Ecosystem Development Team
* @brief TIM STD<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD>ṩTIM<EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>STD<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD><EFBFBD>塣
*
*
**************************************************************************************************
* @attention
* Copyright (c) CEC Huada Electronic Design Co.,Ltd. All rights reserved.
*
**************************************************************************************************
*/
/* <20><><EFBFBD><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD><C4BC>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD> */
#ifndef CIU32L051_STD_TIM_H
#define CIU32L051_STD_TIM_H
/************************************************************************************************/
/**
* @addtogroup CIU32L051_STD_Driver
* @{
*/
/**
* @defgroup TIM TIM
* @brief ͨ<EFBFBD>ö<EFBFBD>ʱ<EFBFBD><EFBFBD>/<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>STD<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @{
*
*/
/************************************************************************************************/
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------includes--------------------------------------------*/
#include "ciu32l051_std_common.h"
/*-----------------------------------------type define------------------------------------------*/
/************************************************************************************************/
/**
* @defgroup TIM_Types TIM Types
* @brief TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><EFBFBD><EFBFBD>
* @{
*/
/************************************************************************************************/
/**
* @brief TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<EFBFBD>嶨<EFBFBD><EFBFBD>
*/
typedef struct
{
uint32_t prescaler; /**< TIMʱ<4D>ӵ<EFBFBD>Ԥ<EFBFBD><D4A4>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x0000~0xFFFF֮<46><D6AE> */
uint32_t counter_mode; /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽѡ<CABD><D1A1>
@arg TIM_COUNTER_MODE_UP ... */
uint32_t period; /**< <20>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x0000~0xFFFF֮<46><D6AE> */
uint32_t clock_div; /**< TIMʱ<4D>ӷ<EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>
@arg TIM_CLOCK_DTS_DIV1 ... */
uint32_t auto_reload_preload; /**< <20>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD>Ԥ<EFBFBD><D4A4><EFBFBD><EFBFBD>
@arg TIM_AUTORELOAD_PRE_DISABLE ... */
}std_tim_basic_init_t;
/**
* @brief TIM<EFBFBD><EFBFBD><EFBFBD>벶<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<EFBFBD>嶨<EFBFBD><EFBFBD>
*/
typedef struct
{
uint32_t input_capture_pol; /**< <20><><EFBFBD><EFBFBD><EFBFBD>źŵ<C5BA><C5B5><EFBFBD>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1>
@arg TIM_INPUT_POL_RISING ... */
uint32_t input_capture_sel; /**< <20><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>
@arg TIM_INPUT_CAPTURE_SEL_DIRECTTI ... */
uint32_t input_capture_prescaler; /**< <20><><EFBFBD>벶<EFBFBD><EBB2B6>Ԥ<EFBFBD><D4A4>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>
@arg TIM_INPUT_CAPTURE_PSC_DIV1 ... */
uint32_t input_capture_filter; /**< <20><><EFBFBD>벶<EFBFBD><EBB2B6><EFBFBD>˲<EFBFBD><CBB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>壬<EFBFBD><E5A3AC>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x0~0x7֮<37><D6AE> */
}std_tim_input_capture_init_t;
/**
* @brief TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƚϲ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<EFBFBD>嶨<EFBFBD><EFBFBD>
*/
typedef struct
{
uint32_t output_compare_mode; /**< TIM<49><4D><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>
@arg TIM_OUTPUT_MODE_ACTIVE ... */
uint32_t pulse; /**< TIM<49><4D><EFBFBD>벶<EFBFBD><EBB2B6><EFBFBD>ȽϼĴ<CFBC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x0000~0xFFFF֮<46><D6AE> */
uint32_t output_pol; /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD>
@arg TIM_OUTPUT_POL_HIGH ... */
uint32_t output_preloadccx; /**< ͨ<><CDA8>Ԥ<EFBFBD><D4A4><EFBFBD><EFBFBD>ʹ<EFBFBD>ܶ<EFBFBD><DCB6><EFBFBD>
@arg TIM_OUTPUT_PRECC_ENABLE ... */
uint32_t output_fast_mode; /**< <20><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>
@arg TIM_OUTPUT_FAST_ENABLE ...
@note <EFBFBD>ò<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч */
}std_tim_output_compare_init_t;
/**
* @}
*/
/*--------------------------------------------define--------------------------------------------*/
/************************************************************************************************/
/**
* @defgroup TIM_Constants TIM Constants
* @brief TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>弰<EFBFBD>궨<EFBFBD><EFBFBD>
* @{
*
*/
/************************************************************************************************/
/* TIM<49><4D><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD> */
#define TIM_COUNTER_MODE_UP (0x00000000U) /**< <20><><EFBFBD>ϼ<EFBFBD><CFBC><EFBFBD> */
#define TIM_COUNTER_MODE_DOWN TIM_CR1_DIR /**< <20><><EFBFBD>¼<EFBFBD><C2BC><EFBFBD> */
#define TIM_COUNTER_MODE_CENT_MODE1 TIM_CR1_CMS_CENTER_UP /**< <20><><EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD>ģʽ1 */
#define TIM_COUNTER_MODE_CENT_MODE2 TIM_CR1_CMS_CENTER_DOWN /**< <20><><EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD>ģʽ2 */
#define TIM_COUNTER_MODE_CENT_MODE3 TIM_CR1_CMS_CENTER_UP_DOWN /**< <20><><EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD>ģʽ3 */
/* TIM<49><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define TIM_COUNTER_UP (0x00000000U) /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ:<3A><><EFBFBD><EFBFBD> */
#define TIM_COUNTER_DOWN TIM_CR1_DIR /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ:<3A><><EFBFBD><EFBFBD> */
/* TIM<49>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD>Ԥװ<D4A4><D7B0>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
#define TIM_AUTORELOAD_PRE_DISABLE (0x00000000U) /**< <20><>ֹ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>Ԥװ<D4A4>ع<EFBFBD><D8B9><EFBFBD> */
#define TIM_AUTORELOAD_PRE_ENABLE TIM_CR1_ARPE /**< ʹ<>ܼĴ<DCBC><C4B4><EFBFBD>Ԥװ<D4A4>ع<EFBFBD><D8B9><EFBFBD> */
/* TIM<49><4D><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>Դѡ<D4B4><D1A1> */
#define TIM_UPDATE_SOURCE_REGULAR (0x00000000U) /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>紥<EFBFBD><E7B4A5> */
#define TIM_UPDATE_SOURCE_COUNTER TIM_CR1_URS /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>硢UG<55><47>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
/* TIMʱ<4D>ӷ<EFBFBD>Ƶ */
#define TIM_CLOCK_DTS_DIV1 (0x00000000U) /**< tDTS=tTIMx_KCLK */
#define TIM_CLOCK_DTS_DIV2 TIM_CR1_CLK_DIV2 /**< tDTS=2*tTIMx_KCLK */
#define TIM_CLOCK_DTS_DIV4 TIM_CR1_CLK_DIV4 /**< tDTS=4*tTIMx_KCLK */
/* TIMͨ<4D><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define TIM_CHANNEL_1 (0x00U) /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD> */
#define TIM_CHANNEL_2 (0x01U) /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD> */
#define TIM_CHANNEL_3 (0x02U) /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>3<EFBFBD><33><EFBFBD><EFBFBD> */
#define TIM_CHANNEL_4 (0x03U) /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>4<EFBFBD><34><EFBFBD><EFBFBD> */
/* TIM<49><4D><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD> */
#define TIM_INPUT_POL_RISING (0x00000000U) /**< δ<><CEB4><EFBFBD><EFBFBD>/<2F><><EFBFBD><EFBFBD><EFBFBD>ش<EFBFBD><D8B4><EFBFBD> */
#define TIM_INPUT_POL_FALLING TIM_CCEN_CC1P /**< <20><><EFBFBD><EFBFBD>/<2F>½<EFBFBD><C2BD>ش<EFBFBD><D8B4><EFBFBD> */
#define TIM_INPUT_POL_BOTH (TIM_CCEN_CC1P | TIM_CCEN_CC1NP) /**< δ<><CEB4><EFBFBD><EFBFBD>/<2F><><EFBFBD><EFBFBD><EFBFBD>½<EFBFBD><C2BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
/* TIM<49><4D><EFBFBD>벶<EFBFBD><EBB2B6>ѡ<EFBFBD><D1A1> */
#define TIM_INPUT_CAPTURE_SEL_DIRECTTI TIM_CCM1_CC1S_DIRECTTI /**< TIM<49><4D><EFBFBD><EFBFBD>1, 2, 3 or 4<><34><EFBFBD>ұ<EFBFBD>ӳ<EFBFBD>䵽IC1, IC2, IC3 or IC4<43><34>һһ<D2BB><D2BB>Ӧ<EFBFBD><D3A6> */
#define TIM_INPUT_CAPTURE_SEL_INDIRECTTI TIM_CCM1_CC1S_INDIRECTTI /**< TIM<49><4D><EFBFBD><EFBFBD>1, 2, 3 or 4<><34><EFBFBD>ұ<EFBFBD>ӳ<EFBFBD>䵽IC2, IC1, IC4 or IC3<43><33>һһ<D2BB><D2BB>Ӧ<EFBFBD><D3A6> */
#define TIM_INPUT_CAPTURE_SEL_TRC TIM_CCM1_CC1S_TRC /**< TIM<49><4D><EFBFBD><EFBFBD>1, 2, 3 or 4<><34><EFBFBD>ұ<EFBFBD>ӳ<EFBFBD>䵽TRC */
/* TIM<49><4D><EFBFBD>벶<EFBFBD><EBB2B6>Ԥ<EFBFBD><D4A4>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define TIM_INPUT_CAPTURE_PSC_DIV1 (0x00000000U) /**< <20><>Ԥ<EFBFBD><D4A4>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ÿ<EFBFBD><C3BF><EFBFBD>⵽һ<E2B5BD><D2BB><EFBFBD><EFBFBD><EFBFBD>ر<EFBFBD>ִ<EFBFBD>в<EFBFBD><D0B2><EFBFBD> */
#define TIM_INPUT_CAPTURE_PSC_DIV2 TIM_CCM1_IC1PSC_DIV2 /**< ÿ<><C3BF><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD>¼<EFBFBD>ִ<EFBFBD><D6B4>һ<EFBFBD>β<EFBFBD><CEB2><EFBFBD> */
#define TIM_INPUT_CAPTURE_PSC_DIV4 TIM_CCM1_IC1PSC_DIV4 /**< ÿ<><C3BF><EFBFBD><EFBFBD>4<EFBFBD><34><EFBFBD>¼<EFBFBD>ִ<EFBFBD><D6B4>һ<EFBFBD>β<EFBFBD><CEB2><EFBFBD> */
#define TIM_INPUT_CAPTURE_PSC_DIV8 TIM_CCM1_IC1PSC_DIV8 /**< ÿ<><C3BF><EFBFBD><EFBFBD>8<EFBFBD><38><EFBFBD>¼<EFBFBD>ִ<EFBFBD><D6B4>һ<EFBFBD>β<EFBFBD><CEB2><EFBFBD> */
/* TIM<49><4D><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>Ԥװ<D4A4><D7B0>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
#define TIM_OUTPUT_PRECC_DISABLE (0x00000000U) /**< <20><>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>Ԥװ<D4A4><D7B0>ģʽ */
#define TIM_OUTPUT_PRECC_ENABLE TIM_CCM1_OC1PE /**< ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>Ԥװ<D4A4><D7B0>ģʽ */
/* TIM<49><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> */
#define TIM_OUTPUT_FAST_DISABLE (0x00000000U) /**< <20><>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD><EFBFBD>ȽϿ<C8BD><CFBF><EFBFBD>ģʽ */
#define TIM_OUTPUT_FAST_ENABLE TIM_CCM1_OC1FE /**< ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȽϿ<C8BD><CFBF><EFBFBD>ģʽ */
/* TIM<49><4D><EFBFBD><EFBFBD><EFBFBD>Ƚϼ<C8BD><CFBC>Զ<EFBFBD><D4B6><EFBFBD> */
#define TIM_OUTPUT_POL_HIGH (0x00000000U) /**< <20>Ƚ<EFBFBD><C8BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A>ߵ<EFBFBD>ƽΪ<C6BD><CEAA>Ч<EFBFBD><D0A7>ƽ */
#define TIM_OUTPUT_POL_LOW TIM_CCEN_CC1P /**< <20>Ƚ<EFBFBD><C8BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A>͵<EFBFBD>ƽΪ<C6BD><CEAA>Ч<EFBFBD><D0A7>ƽ */
/* TIM<49><4D><EFBFBD><EFBFBD><EFBFBD>Ƚϲ<C8BD><CFB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define TIM_OUTPUT_MODE_FROZEN (0x00000000U) /**< <20><><EFBFBD><EFBFBD> */
#define TIM_OUTPUT_MODE_ACTIVE TIM_CCM1_OC1M_ACTIVE /**< ͨ<><CDA8>1<EFBFBD><31><EFBFBD><EFBFBD>Ϊƥ<CEAA><C6A5>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7>ƽ */
#define TIM_OUTPUT_MODE_INACTIVE TIM_CCM1_OC1M_INACTIVE /**< ͨ<><CDA8>1<EFBFBD><31><EFBFBD><EFBFBD>Ϊƥ<CEAA><C6A5>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7>ƽ */
#define TIM_OUTPUT_MODE_TOGGLE TIM_CCM1_OC1M_TOGGLE /**< <20><>ת */
#define TIM_OUTPUT_MODE_FORCED_INACTIVE TIM_CCM1_OC1M_FORCED_INACTIVE /**< ǿ<>Ʊ<EFBFBD>Ϊ<EFBFBD><CEAA>Ч<EFBFBD><D0A7>ƽ */
#define TIM_OUTPUT_MODE_FORCED_ACTIVE TIM_CCM1_OC1M_FORCED_ACTIVE /**< ǿ<>Ʊ<EFBFBD>Ϊ<EFBFBD><CEAA>Ч<EFBFBD><D0A7>ƽ */
#define TIM_OUTPUT_MODE_PWM1 TIM_CCM1_OC1M_PWM1 /**< PWMģʽ1 */
#define TIM_OUTPUT_MODE_PWM2 TIM_CCM1_OC1M_PWM2 /**< PWMģʽ2 */
/* TIM ETR<54><52><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD> */
#define TIM_ETR_POL_HIGH (0x00000000U) /**< ETR<54>ߵ<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч */
#define TIM_ETR_POL_LOW TIM_SMC_ETP /**< ETR<54>͵<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD>½<EFBFBD><C2BD><EFBFBD><EFBFBD><EFBFBD>Ч */
/* TIM ETRԤ<52><D4A4>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD> */
#define TIM_ETR_PSC_DIV1 (0x00000000U) /**< Ԥ<><D4A4>Ƶ<EFBFBD><C6B5><EFBFBD>ر<EFBFBD> */
#define TIM_ETR_PSC_DIV2 TIM_SMC_ET_PRE_DIV2 /**< ETR<54><52><EFBFBD><EFBFBD>ԴԤ<D4B4><D4A4>Ƶϵ<C6B5><CFB5>Ϊ2 */
#define TIM_ETR_PSC_DIV4 TIM_SMC_ET_PRE_DIV4 /**< ETR<54><52><EFBFBD><EFBFBD>ԴԤ<D4B4><D4A4>Ƶϵ<C6B5><CFB5>Ϊ4 */
#define TIM_ETR_PSC_DIV8 TIM_SMC_ET_PRE_DIV8 /**< ETR<54><52><EFBFBD><EFBFBD>ԴԤ<D4B4><D4A4>Ƶϵ<C6B5><CFB5>Ϊ8 */
/* TIMʱ<4D><CAB1>Դѡ<D4B4><D1A1> */
#define TIM_CLKSRC_INT (0x00000000U) /**< TIMʱ<4D><CAB1>Դ<EFBFBD><D4B4><EFBFBD>ڲ<EFBFBD>ʱ<EFBFBD><CAB1> */
#define TIM_CLKSRC_ETR_MODE1 TIM_SMC_SM_SEL_EXT_MODE1 /**< TIMʱ<4D><CAB1>Դ<EFBFBD><D4B4><EFBFBD>ⲿʱ<E2B2BF><CAB1>Դģʽ1 */
#define TIM_CLKSRC_ETR_MODE2 TIM_SMC_ECEN /**< TIMʱ<4D><CAB1>Դ<EFBFBD><D4B4><EFBFBD>ⲿʱ<E2B2BF><CAB1>Դģʽ2 */
/* TIMʱ<4D>Ӽ<EFBFBD><D3BC>Զ<EFBFBD><D4B6><EFBFBD> */
#define TIM_CLK_ETR_POL_HIGH (0x00000000U) /**< ETRʱ<52><CAB1>Դ<EFBFBD>ļ<EFBFBD><C4BC>ԣ<EFBFBD><D4A3><EFBFBD><EFBFBD><EFBFBD>Ч */
#define TIM_CLK_ETR_POL_LOW TIM_SMC_ETP /**< ETRʱ<52><CAB1>Դ<EFBFBD>ļ<EFBFBD><C4BC>ԣ<EFBFBD><D4A3><EFBFBD><EFBFBD><EFBFBD>Ч */
#define TIM_CLK_TIX_POL_RISING (0x00000000U) /**< TIxʱ<78><CAB1>Դ<EFBFBD>ļ<EFBFBD><C4BC>ԣ<EFBFBD><D4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч */
#define TIM_CLK_TIX_POL_FALLING TIM_CCEN_CC1P /**< TIxʱ<78><CAB1>Դ<EFBFBD>ļ<EFBFBD><C4BC>ԣ<EFBFBD><D4A3>½<EFBFBD><C2BD><EFBFBD><EFBFBD><EFBFBD>Ч */
#define TIM_CLK_TIX_POL_BOTH (TIM_CCEN_CC1P | TIM_CCEN_CC1NP) /**< TIxʱ<78><CAB1>Դ<EFBFBD>ļ<EFBFBD><C4BC>ԣ<EFBFBD>˫<EFBFBD><CBAB><EFBFBD><EFBFBD>Ч */
/* TIM DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>Դ */
#define TIM_GEN_DMA_REQ_CCX (0x00000000U) /**< <20><><EFBFBD><EFBFBD>CCx<43>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD> */
#define TIM_GEN_DMA_REQ_UPDATE (TIM_CR2_CC_DMASEL) /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD> */
/* TIM<49>¼<EFBFBD>Դ */
#define TIM_EVENT_SRC_UPDATE TIM_EVTG_UG /**< <20><><EFBFBD>³<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD> */
#define TIM_EVENT_SRC_CC1 TIM_EVTG_CC1G /**< <20><>ͨ<EFBFBD><CDA8>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD><C8BD>¼<EFBFBD> */
#define TIM_EVENT_SRC_CC2 TIM_EVTG_CC2G /**< <20><>ͨ<EFBFBD><CDA8>2<EFBFBD><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD><C8BD>¼<EFBFBD> */
#define TIM_EVENT_SRC_CC3 TIM_EVTG_CC3G /**< <20><>ͨ<EFBFBD><CDA8>3<EFBFBD><33><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD><C8BD>¼<EFBFBD> */
#define TIM_EVENT_SRC_CC4 TIM_EVTG_CC4G /**< <20><>ͨ<EFBFBD><CDA8>4<EFBFBD><34><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD><C8BD>¼<EFBFBD> */
#define TIM_EVENT_SRC_TRIG TIM_EVTG_TG /**< <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD> */
/* TIM<49>ж϶<D0B6><CFB6><EFBFBD> */
#define TIM_INTERRUPT_UPDATE TIM_DIER_UIE /**< <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD> */
#define TIM_INTERRUPT_CC1 TIM_DIER_CC1IE /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>1<EFBFBD>ж<EFBFBD> */
#define TIM_INTERRUPT_CC2 TIM_DIER_CC2IE /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>1<EFBFBD>ж<EFBFBD>2 */
#define TIM_INTERRUPT_CC3 TIM_DIER_CC3IE /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>1<EFBFBD>ж<EFBFBD>3 */
#define TIM_INTERRUPT_CC4 TIM_DIER_CC4IE /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>1<EFBFBD>ж<EFBFBD>4 */
#define TIM_INTERRUPT_TRIG TIM_DIER_TIE /**< <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD> */
/* TIM DMAԴ */
#define TIM_DMA_REQ_UPDATE TIM_DIER_UDMAEN /**< <20><><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD> */
#define TIM_DMA_REQ_CC1 TIM_DIER_CC1_DMAEN /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD> */
#define TIM_DMA_REQ_CC2 TIM_DIER_CC2_DMAEN /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD> */
#define TIM_DMA_REQ_CC3 TIM_DIER_CC3_DMAEN /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>3<EFBFBD><33><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD> */
#define TIM_DMA_REQ_CC4 TIM_DIER_CC4_DMAEN /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>4<EFBFBD><34><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD> */
#define TIM_DMA_REQ_TRIG TIM_DIER_TDMAEN /**< <20><><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD> */
/* TIM<49><4D>־<EFBFBD><D6BE><EFBFBD><EFBFBD> */
#define TIM_FLAG_ALL (0x1E5FU) /**< <20><><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD>־ */
#define TIM_FLAG_UPDATE TIM_SR_UIF /**< <20><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־ */
#define TIM_FLAG_CC1 TIM_SR_CC1IF /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>1<EFBFBD>¼<EFBFBD><C2BC><EFBFBD>־ */
#define TIM_FLAG_CC2 TIM_SR_CC2IF /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>2<EFBFBD>¼<EFBFBD><C2BC><EFBFBD>־ */
#define TIM_FLAG_CC3 TIM_SR_CC3IF /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>3<EFBFBD>¼<EFBFBD><C2BC><EFBFBD>־ */
#define TIM_FLAG_CC4 TIM_SR_CC4IF /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>4<EFBFBD>¼<EFBFBD><C2BC><EFBFBD>־ */
#define TIM_FLAG_TRIG TIM_SR_TIF /**< <20><><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD>־ */
#define TIM_FLAG_CC1OF TIM_SR_CC1OF /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>1<EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ */
#define TIM_FLAG_CC2OF TIM_SR_CC2OF /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>2<EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ */
#define TIM_FLAG_CC3OF TIM_SR_CC3OF /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>3<EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ */
#define TIM_FLAG_CC4OF TIM_SR_CC4OF /**< <20><><EFBFBD><EFBFBD>/<2F>Ƚ<EFBFBD>3<EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ */
/* TIM<49><4D><EFBFBD><EFBFBD>OCxREF<45><46><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ */
#define TIM_CLEAR_INPUT_SRC_ETR TIM_SMC_OCCS /**< <20><><EFBFBD><EFBFBD>OCREF<45><46><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>Դ<EFBFBD><D4B4>ETRF<52><46><EFBFBD><EFBFBD> */
#define TIM_CLEAR_INPUT_SRC_COMP1 (0x00000000U) /**< OCREF_CLR_INPUT<55><54><EFBFBD>ӵ<EFBFBD>COMP1<50><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define TIM_CLEAR_INPUT_SRC_COMP2 TIM_CFG_OCREF_CLR /**< OCREF_CLR_INPUT<55><54><EFBFBD>ӵ<EFBFBD>COMP2<50><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
/* TIM<49><4D><EFBFBD><EFBFBD>OCxREF<45><46><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD> */
#define TIM_CLEAR_INPUT_POL_HIGH (0x00000000U) /**< ETR<54><52><EFBFBD>ż<EFBFBD><C5BC><EFBFBD>:<3A>ߵ<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч */
#define TIM_CLEAR_INPUT_POL_LOW TIM_SMC_ETP /**< ETR<54><52><EFBFBD>ż<EFBFBD><C5BC><EFBFBD>:<3A>͵<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD>½<EFBFBD><C2BD><EFBFBD><EFBFBD><EFBFBD>Ч */
/* TIM<49><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽѡ<CABD><D1A1> */
#define TIM_ENCODER_MODE_TI1 TIM_SMC_SM_SEL_ENCODE_TI1 /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ1, x2ģʽ,
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TI1FP1<EFBFBD><EFBFBD>ƽ<EFBFBD><EFBFBD>TI2FP2<EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>ݼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define TIM_ENCODER_MODE_TI2 TIM_SMC_SM_SEL_ENCODE_TI2 /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ2, x2ģʽ,
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TI2FP2<EFBFBD><EFBFBD>ƽ<EFBFBD><EFBFBD>TI1FP1<EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>ݼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
#define TIM_ENCODER_MODE_TI12 TIM_SMC_SM_SEL_ENCODE_TI12 /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ3, x4ģʽ,
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TI1FP1<EFBFBD><EFBFBD>TI2FP2<EFBFBD>ı<EFBFBD><EFBFBD>ؼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ķ<EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ƽ */
/* TIM<49><4D>ģʽѡ<CABD><D1A1>(TRIG_OUT)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
#define TIM_TRIG_OUT_RESET (0x00000000U) /**< TIM1_EVTG<54>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>е<EFBFBD>UGλ<47><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TRIG_OUT<55><54> */
#define TIM_TRIG_OUT_ENABLE TIM_CR2_MM_SEL_ENABLE /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD>ź<EFBFBD>CEN<45><4E><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TRIG_OUT<55><54> */
#define TIM_TRIG_OUT_UPDATE TIM_CR2_MM_SEL_UPDATE /**< ѡ<><D1A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TRIG_OUT<55><54> */
#define TIM_TRIG_OUT_CC1 TIM_CR2_MM_SEL_CC1IF /**< <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>ƥ<EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TRIG_OUT<55><54> */
#define TIM_TRIG_OUT_OC1REF TIM_CR2_MM_SEL_OC1REF /**< OC1REF<45>ź<EFBFBD><C5BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(TRIG_OUT) */
#define TIM_TRIG_OUT_OC2REF TIM_CR2_MM_SEL_OC2REF /**< OC2REF<45>ź<EFBFBD><C5BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(TRIG_OUT) */
#define TIM_TRIG_OUT_OC3REF TIM_CR2_MM_SEL_OC3REF /**< OC3REF<45>ź<EFBFBD><C5BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(TRIG_OUT) */
#define TIM_TRIG_OUT_OC4REF TIM_CR2_MM_SEL_OC4REF /**< OC4REF<45>ź<EFBFBD><C5BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(TRIG_OUT) */
/* TIM<49><4D>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
#define TIM_SLAVE_MODE_DISABLE (0x00000000U) /**< <20><>ֹ<EFBFBD><D6B9>ģʽ */
#define TIM_SLAVE_MODE_RESET TIM_SMC_SM_SEL_RESET /**< <20><>λģʽ */
#define TIM_SLAVE_MODE_GATED TIM_SMC_SM_SEL_GATED /**< <20>ſ<EFBFBD>ģʽ */
#define TIM_SLAVE_MODE_TRIG TIM_SMC_SM_SEL_TRIG /**< <20><><EFBFBD><EFBFBD>ģʽ */
/* TIM<49><4D><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
#define TIM_TRIG_SOURCE_ITR0 TIM_SMC_TS_ITR0 /**< <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><30>ITR0<52><30> */
#define TIM_TRIG_SOURCE_ITR1 TIM_SMC_TS_ITR1 /**< <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31>ITR1<52><31> */
#define TIM_TRIG_SOURCE_ITR2 TIM_SMC_TS_ITR2 /**< <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32>ITR2<52><32> */
#define TIM_TRIG_SOURCE_TI1F_ED TIM_SMC_TS_TI1F_ED /**< TI1<49><31><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TI1F_ED<45><44> */
#define TIM_TRIG_SOURCE_TI1FP1 TIM_SMC_TS_TI1FP1 /**< <20>˲<EFBFBD><CBB2><EFBFBD><EFBFBD>Ķ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31>TI1FP1<50><31> */
#define TIM_TRIG_SOURCE_TI2FP2 TIM_SMC_TS_TI2FP2 /**< <20>˲<EFBFBD><CBB2><EFBFBD><EFBFBD>Ķ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32>TI1FP2<50><32> */
#define TIM_TRIG_SOURCE_ETRF TIM_SMC_TS_ETRF /**< <20>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>루ETRF<52><46> */
/* TIM<49><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Բ<EFBFBD><D4B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
#define TIM_TRIG_ETR_POL_RISING (0x00000000U) /**< ETR<54><52><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A>ߵ<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч */
#define TIM_TRIG_ETR_POL_FALLING TIM_SMC_ETP /**< ETR<54><52><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A>͵<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD>½<EFBFBD><C2BD><EFBFBD><EFBFBD><EFBFBD>Ч */
#define TIM_TRIG_TIX_POL_RISING (0x00000000U) /**< TIxFPx<50><78>TI1F_ED<45><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A>ߵ<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч */
#define TIM_TRIG_TIX_POL_FALLING TIM_CCEN_CC1P /**< TIxFPx<50><78>TI1F_ED<45><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A>͵<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD>½<EFBFBD><C2BD><EFBFBD><EFBFBD><EFBFBD>Ч */
#define TIM_TRIG_TIX_POL_BOTH (TIM_CCEN_CC1P | TIM_CCEN_CC1NP) /**< TIxFPx<50><78>TI1F_ED<45><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><><EFBFBD><EFBFBD><EFBFBD>½<EFBFBD><C2BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
/* TIM<49><4D><EFBFBD><EFBFBD>Ԥ<EFBFBD><D4A4>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>*/
#define TIM_TRIG_PSC_DIV1 TIM_ETR_PSC_DIV1 /**< δʹ<CEB4><CAB9>Ԥ<EFBFBD><D4A4>Ƶ */
#define TIM_TRIG_PSC_DIV2 TIM_ETR_PSC_DIV2 /**< <20>ⲿETRʱ<52><CAB1>Ԥ<EFBFBD><D4A4>Ƶ = 2 */
#define TIM_TRIG_PSC_DIV4 TIM_ETR_PSC_DIV4 /**< <20>ⲿETRʱ<52><CAB1>Ԥ<EFBFBD><D4A4>Ƶ = 4 */
#define TIM_TRIG_PSC_DIV8 TIM_ETR_PSC_DIV8 /**< <20>ⲿETRʱ<52><CAB1>Ԥ<EFBFBD><D4A4>Ƶ = 8 */
/* TIM ETR<54><52><EFBFBD><EFBFBD> */
#define TIM_TIM3_ETR_GPIO TIM3_AF1_ETR_SEL_GPIO /**< TIM3_ETR<54><52><EFBFBD>ӵ<EFBFBD>GPIO */
#define TIM_TIM3_ETR_COMP1 TIM3_AF1_ETR_SEL_COMP1 /**< TIM3_ETR<54><52><EFBFBD>ӵ<EFBFBD>COMP1<50><31><EFBFBD><EFBFBD> */
#define TIM_TIM3_ETR_COMP2 TIM3_AF1_ETR_SEL_COMP2 /**< TIM3_ETR<54><52><EFBFBD>ӵ<EFBFBD>COMP2<50><32><EFBFBD><EFBFBD> */
#define TIM_TIM3_ETR_LXTAL TIM3_AF1_ETR_SEL_LXTAL /**< TIM3_ETR<54><52><EFBFBD>ӵ<EFBFBD>LXTAL */
#define TIM_TIM3_ETR_HXTAL TIM3_AF1_ETR_SEL_HXTAL /**< TIM3_ETR<54><52><EFBFBD>ӵ<EFBFBD>HXTAL */
#define TIM_TIM3_ETR_MCO TIM3_AF1_ETR_SEL_MCO /**< TIM3_ETR<54><52><EFBFBD>ӵ<EFBFBD>MCO */
#define TIM_TIM3_ETR_RCL TIM3_AF1_ETR_SEL_RCL /**< TIM3_ETR<54><52><EFBFBD>ӵ<EFBFBD>RCL */
#define TIM_TIM4_ETR_GPIO TIM4_AF1_ETR_SEL_GPIO /**< TIM4_ETR<54><52><EFBFBD>ӵ<EFBFBD>GPIO */
#define TIM_TIM4_ETR_COMP1 TIM4_AF1_ETR_SEL_COMP1 /**< TIM4_ETR<54><52><EFBFBD>ӵ<EFBFBD>COMP1<50><31><EFBFBD><EFBFBD> */
#define TIM_TIM4_ETR_COMP2 TIM4_AF1_ETR_SEL_COMP2 /**< TIM4_ETR<54><52><EFBFBD>ӵ<EFBFBD>COMP2<50><32><EFBFBD><EFBFBD> */
#define TIM_TIM5_ETR_GPIO TIM5_AF1_ETR_SEL_GPIO /**< TIM5_ETR<54><52><EFBFBD>ӵ<EFBFBD>GPIO */
#define TIM_TIM5_ETR_COMP1 TIM5_AF1_ETR_SEL_COMP1 /**< TIM5_ETR<54><52><EFBFBD>ӵ<EFBFBD>COMP1<50><31><EFBFBD><EFBFBD> */
#define TIM_TIM5_ETR_COMP2 TIM5_AF1_ETR_SEL_COMP2 /**< TIM5_ETR<54><52><EFBFBD>ӵ<EFBFBD>COMP2<50><32><EFBFBD><EFBFBD> */
/* TIM<49>ⲿʱ<E2B2BF><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1> */
#define TIM_TIM3_TI1_GPIO TIM_TISEL_TI1_SEL_CH1 /**< TIM3_TI1<49><31><EFBFBD>ӵ<EFBFBD>GPIO */
#define TIM_TIM3_TI1_COMP1 TIM_TISEL_TI1_SEL_COMP1 /**< TIM3_TI1<49><31><EFBFBD>ӵ<EFBFBD>COMP1<50><31><EFBFBD><EFBFBD> */
#define TIM_TIM3_TI2_GPIO TIM_TISEL_TI2_SEL_CH2 /**< TIM3_TI2<49><32><EFBFBD>ӵ<EFBFBD>GPIO */
#define TIM_TIM3_TI2_COMP2 TIM_TISEL_TI2_SEL_COMP2 /**< TIM3_TI2<49><32><EFBFBD>ӵ<EFBFBD>COMP2<50><32><EFBFBD><EFBFBD> */
#define TIM_TIM3_TI4_GPIO TIM3_TISEL_TI4_SEL_CH4 /**< TIM3_TI4<49><34><EFBFBD>ӵ<EFBFBD>GPIO */
#define TIM_TIM3_TI4_LXTAL TIM3_TISEL_TI4_SEL_LXTAL /**< TIM3_TI4<49><34><EFBFBD>ӵ<EFBFBD>LXTALʱ<4C><CAB1> */
#define TIM_TIM3_TI4_HXTAL TIM3_TISEL_TI4_SEL_HXTAL /**< TIM3_TI4<49><34><EFBFBD>ӵ<EFBFBD>HXTALʱ<4C><CAB1> */
#define TIM_TIM3_TI4_MCO TIM3_TISEL_TI4_SEL_MCO /**< TIM3_TI4<49><34><EFBFBD>ӵ<EFBFBD>MCO */
#define TIM_TIM3_TI4_RCL TIM3_TISEL_TI4_SEL_RCL /**< TIM3_TI4<49><34><EFBFBD>ӵ<EFBFBD>RCLʱ<4C><CAB1> */
#define TIM_TIM4_TI1_GPIO TIM_TISEL_TI1_SEL_CH1 /**< TIM4_TI1<49><31><EFBFBD>ӵ<EFBFBD>GPIO */
#define TIM_TIM4_TI1_COMP1 TIM_TISEL_TI1_SEL_COMP1 /**< TIM4_TI1<49><31><EFBFBD>ӵ<EFBFBD>COMP1<50><31><EFBFBD><EFBFBD> */
#define TIM_TIM4_TI2_GPIO TIM_TISEL_TI2_SEL_CH2 /**< TIM4_TI2<49><32><EFBFBD>ӵ<EFBFBD>GPIO */
#define TIM_TIM4_TI2_COMP2 TIM_TISEL_TI2_SEL_COMP2 /**< TIM4_TI2<49><32><EFBFBD>ӵ<EFBFBD>COMP2<50><32><EFBFBD><EFBFBD> */
#define TIM_TIM5_TI1_GPIO TIM_TISEL_TI1_SEL_CH1 /**< TIM5_TI1<49><31><EFBFBD>ӵ<EFBFBD>GPIO */
#define TIM_TIM5_TI1_COMP1 TIM_TISEL_TI1_SEL_COMP1 /**< TIM5_TI1<49><31><EFBFBD>ӵ<EFBFBD>COMP1<50><31><EFBFBD><EFBFBD> */
#define TIM_TIM5_TI2_GPIO TIM_TISEL_TI2_SEL_CH2 /**< TIM5_TI2<49><32><EFBFBD>ӵ<EFBFBD>GPIO */
#define TIM_TIM5_TI2_COMP2 TIM_TISEL_TI2_SEL_COMP2 /**< TIM5_TI2<49><32><EFBFBD>ӵ<EFBFBD>COMP2<50><32><EFBFBD><EFBFBD> */
/**
* @}
*/
/*-------------------------------------------functions------------------------------------------*/
/************************************************************************************************/
/**
* @defgroup TIM_External_Functions TIM External Functions
* @brief TIM<EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><EFBFBD>
* @{
*
*/
/************************************************************************************************/
/**
* @brief TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_enable(TIM_t *timx)
{
timx->CR1 |= TIM_CR1_CEN;
}
/**
* @brief TIMֹͣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_disable(TIM_t *timx)
{
timx->CR1 &= (~TIM_CR1_CEN);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMԤ<EFBFBD><EFBFBD>Ƶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param presc Ԥ<EFBFBD><EFBFBD>Ƶ<EFBFBD><EFBFBD>ֵ
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_psc(TIM_t *timx, uint32_t presc)
{
timx->PSC = (presc);
}
/**
* @brief <EFBFBD><EFBFBD>ȡTIMԤ<EFBFBD><EFBFBD>Ƶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval uint32_t TIMԤ<EFBFBD><EFBFBD>Ƶֵ
*/
__STATIC_INLINE uint32_t std_tim_get_psc(TIM_t *timx)
{
return (timx->PSC);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param counter <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_counter(TIM_t *timx, uint32_t counter)
{
timx->CNT = (counter);
}
/**
* @brief <EFBFBD><EFBFBD>ȡTIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval uint32_t TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
*/
__STATIC_INLINE uint32_t std_tim_get_counter(TIM_t *timx)
{
return (timx->CNT);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM ARRֵ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param autoreload TIM ARRֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>3<EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_autoreload(TIM_t *timx, uint32_t autoreload)
{
timx->ARR = (autoreload);
}
/**
* @brief <EFBFBD><EFBFBD>ȡTIM ARRֵ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval uint32_t TIM ARRֵ
*/
__STATIC_INLINE uint32_t std_tim_get_autoreload(TIM_t *timx)
{
return (timx->ARR);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMʱ<EFBFBD>ӷ<EFBFBD>Ƶֵ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param clk_div ʱ<EFBFBD>ӷ<EFBFBD>Ƶֵ
* @arg TIM_CLOCK_DTS_DIV1: tDTS=tTIM_KCLK
* @arg TIM_CLOCK_DTS_DIV2: tDTS=2*tTIM_KCLK
* @arg TIM_CLOCK_DTS_DIV4: tDTS=4*tTIM_KCLK
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_clock_div(TIM_t *timx, uint32_t clk_div)
{
MODIFY_REG(timx->CR1, TIM_CR1_CLK_DIV, clk_div);
}
/**
* @brief <EFBFBD><EFBFBD>ȡTIMʱ<EFBFBD>ӷ<EFBFBD>Ƶֵ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval uint32_t ʱ<EFBFBD>ӷ<EFBFBD>Ƶֵ
* @arg TIM_CLOCK_DIV1: tDTS=tTIM_KCLK
* @arg TIM_CLOCK_DIV2: tDTS=2*tTIM_KCLK
* @arg TIM_CLOCK_DIV4: tDTS=4*tTIM_KCLK
*/
__STATIC_INLINE uint32_t std_tim_get_clock_div(TIM_t *timx)
{
return (timx->CR1 & TIM_CR1_CLK_DIV);
}
/**
* @brief ʹ<EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ع<EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_arrpreload_enable(TIM_t *timx)
{
timx->CR1 |= TIM_CR1_ARPE;
}
/**
* @brief <EFBFBD><EFBFBD>ֹ<EFBFBD>Զ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ع<EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_arrpreload_disable(TIM_t *timx)
{
timx->CR1 &= (~TIM_CR1_ARPE);
}
/**
* @brief ʹ<EFBFBD>ܸ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_updateevent_enable(TIM_t *timx)
{
timx->CR1 |= TIM_CR1_UDIS;
}
/**
* @brief <EFBFBD><EFBFBD>ֹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_updateevent_disable(TIM_t *timx)
{
timx->CR1 &= (~TIM_CR1_UDIS);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD>ø<EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>Դ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param update_source <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>Դѡ<EFBFBD><EFBFBD>
* @arg TIM_UPDATE_SOURCE_REGULAR
* @arg TIM_UPDATE_SOURCE_COUNTER
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_update_source(TIM_t *timx, uint32_t update_source)
{
MODIFY_REG(timx->CR1, TIM_CR1_URS, update_source);
}
/**
* @brief <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>Դ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval uint32_t <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>Դѡ<EFBFBD><EFBFBD>
* @arg TIM_UPDATE_SOURCE_REGULAR
* @arg TIM_UPDATE_SOURCE_COUNTER
*/
__STATIC_INLINE uint32_t std_tim_get_update_source(TIM_t *timx)
{
return (timx->CR1 & TIM_CR1_URS);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD>ü<EFBFBD><EFBFBD><EFBFBD>ģʽ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param counter_mode <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʽ
* @arg TIM_COUNTER_MODE_UP
* @arg TIM_COUNTER_MODE_DOWN
* @arg TIM_COUNTER_MODE_CENT_MODE1
* @arg TIM_COUNTER_MODE_CENT_MODE2
* @arg TIM_COUNTER_MODE_CENT_MODE3
* @note <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DIR<EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD><EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD>Ϊֻ<EFBFBD><EFBFBD>Ȩ<EFBFBD>ޣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD><EFBFBD><EFBFBD>ģʽ<EFBFBD>л<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>޸<EFBFBD><EFBFBD>쳣<EFBFBD><EFBFBD>Ӧ<EFBFBD>ȸ<EFBFBD>λһ<EFBFBD><EFBFBD>TIM
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_counter_mode(TIM_t *timx, uint32_t counter_mode)
{
MODIFY_REG(timx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), counter_mode);
}
/**
* @brief <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval uint32_t <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʽ
* @arg TIM_COUNTER_MODE_UP
* @arg TIM_COUNTER_MODE_DOWN
* @arg TIM_COUNTER_MODE_CENT_MODE1
* @arg TIM_COUNTER_MODE_CENT_MODE2
* @arg TIM_COUNTER_MODE_CENT_MODE3
*/
__STATIC_INLINE uint32_t std_tim_get_counter_mode(TIM_t *timx)
{
if(timx->CR1 & TIM_CR1_CMS)
{
return (timx->CR1 & TIM_CR1_CMS);
}
else
{
return (timx->CR1 & TIM_CR1_DIR);
}
}
/**
* @brief <EFBFBD><EFBFBD>ȡTIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval bool <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
* @arg true: <EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD>
* @arg false:<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD>ϼ<EFBFBD><EFBFBD><EFBFBD>
*/
__STATIC_INLINE bool std_tim_get_count_dir(TIM_t *timx)
{
return ((timx->CR1 & TIM_CR1_DIR) == (TIM_CR1_DIR));
}
/**
* @brief ʹ<EFBFBD>ܵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_onepulse_enable(TIM_t *timx)
{
timx->CR1 |= TIM_CR1_OPM;
}
/**
* @brief <EFBFBD><EFBFBD>ֹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_onepulse_disable(TIM_t *timx)
{
timx->CR1 &= (~TIM_CR1_OPM);
}
/**
* @brief <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval bool <EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @arg true: <EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @arg false:<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
*/
__STATIC_INLINE bool std_tim_get_onepulse_mode(TIM_t *timx)
{
return ((timx->CR1 & (TIM_CR1_OPM)) == (TIM_CR1_OPM));
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD>ü<EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param clock_source ʱ<EFBFBD><EFBFBD>Դѡ<EFBFBD><EFBFBD>
* @arg TIM_CLKSRC_INT: <EFBFBD>ڲ<EFBFBD>ʱ<EFBFBD><EFBFBD>Դ
* @arg TIM_CLKSRC_ETR_MODE1:<EFBFBD>ⲿʱ<EFBFBD><EFBFBD>ģʽ1
* @arg TIM_CLKSRC_ETR_MODE2:<EFBFBD>ⲿʱ<EFBFBD><EFBFBD>ģʽ2
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_clock_source_config(TIM_t *timx, uint32_t clock_source)
{
MODIFY_REG(timx->SMC, TIM_SMC_SM_SEL | TIM_SMC_ECEN, clock_source);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param event_src <EFBFBD>¼<EFBFBD>Դ
* @arg TIM_EVENT_SRC_UPDATE:<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>Դ
* @arg TIM_EVENT_SRC_CC1: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>1<EFBFBD>¼<EFBFBD>Դ
* @arg TIM_EVENT_SRC_CC2: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>2<EFBFBD>¼<EFBFBD>Դ
* @arg TIM_EVENT_SRC_CC3: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>3<EFBFBD>¼<EFBFBD>Դ
* @arg TIM_EVENT_SRC_CC4: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>4<EFBFBD>¼<EFBFBD>Դ
* @arg TIM_EVENT_SRC_TRIG: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>Դ
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_sw_trig_event(TIM_t *timx, uint32_t event_src)
{
timx->EVTG = event_src;
}
/**
* @brief TIM<EFBFBD>ж<EFBFBD>ʹ<EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param interrupt TIM<EFBFBD>ж<EFBFBD>Դ
* @arg TIM_INTERRUPT_UPDATE: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_CC1: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>1<EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_CC2: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>2<EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_CC3: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>3<EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_CC4: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>4<EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_TRIG: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_interrupt_enable(TIM_t *timx, uint32_t interrupt)
{
timx->DIER |= (interrupt);
}
/**
* @brief TIM<EFBFBD>жϽ<EFBFBD>ֹ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param interrupt TIM<EFBFBD>ж<EFBFBD>Դ
* @arg TIM_INTERRUPT_UPDATE: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_CC1: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>1<EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_CC2: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>2<EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_CC3: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>3<EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_CC4: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>4<EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_TRIG: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_interrupt_disable(TIM_t *timx, uint32_t interrupt)
{
timx->DIER &= (~(interrupt));
}
/**
* @brief <EFBFBD><EFBFBD>ȡTIM<EFBFBD>ж<EFBFBD>Դ<EFBFBD><EFBFBD>״̬
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param interrupt TIM<EFBFBD>ж<EFBFBD>Դ<EFBFBD><EFBFBD>Ϣ
* @arg TIM_INTERRUPT_UPDATE: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_CC1: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>1<EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_CC2: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>2<EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_CC3: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>3<EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_CC4: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>4<EFBFBD>ж<EFBFBD>
* @arg TIM_INTERRUPT_TRIG: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
* @retval bool <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD>״̬
* @arg true: <EFBFBD><EFBFBD>ǰ<EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԴΪʹ<EFBFBD><EFBFBD>״̬
* @arg false:<EFBFBD><EFBFBD>ǰ<EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԴΪ<EFBFBD><EFBFBD>ֹ״̬
*/
__STATIC_INLINE bool std_tim_get_interrupt_enable(TIM_t *timx, uint32_t interrupt)
{
return ((timx->DIER &(interrupt)) == (interrupt));
}
/**
* @brief DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param dam_req TIM_DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_UPDATE: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_CC1: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>1 DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_CC2: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>2 DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_CC3: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>3 DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_CC4: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>4 DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_TRIG: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_dma_req_enable(TIM_t *timx, uint32_t dam_req)
{
timx->DIER |= (dam_req);
}
/**
* @brief DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param dam_req TIM_DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_UPDATE: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_CC1: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>1 DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_CC2: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>2 DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_CC3: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>3 DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_CC4: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>4 DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_TRIG: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_dma_req_disable(TIM_t *timx, uint32_t dam_req)
{
timx->DIER &= (~(dam_req));
}
/**
* @brief <EFBFBD><EFBFBD>ȡTIM DMAʹ<EFBFBD><EFBFBD>״̬
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param dam_req TIM_DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_UPDATE: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_CC1: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>1 DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_CC2: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>2 DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_CC3: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>3 DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_CC4: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>4 DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_DMA_REQ_TRIG: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval bool <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD>״̬
* @arg true: <EFBFBD><EFBFBD>ǰDMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԴΪʹ<EFBFBD><EFBFBD>״̬
* @arg false:<EFBFBD><EFBFBD>ǰDMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԴΪ<EFBFBD><EFBFBD>ֹ״̬
*/
__STATIC_INLINE bool std_tim_get_dma_req_enable(TIM_t *timx, uint32_t dam_req)
{
return ((timx->DIER &(dam_req)) == (dam_req));
}
/**
* @brief <EFBFBD><EFBFBD>ȡTIM<EFBFBD><EFBFBD>־״̬
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param flag TIM<EFBFBD><EFBFBD>־<EFBFBD><EFBFBD>Ϣ
* @arg TIM_FLAG_UPDATE: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC1: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>1<EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC2: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>2<EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC3: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>3<EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC4: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>4<EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_TRIG: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC1OF: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>1<EFBFBD>ظ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC2OF: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>2<EFBFBD>ظ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC3OF: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>3<EFBFBD>ظ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC4OF: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>4<EFBFBD>ظ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
* @retval bool <EFBFBD><EFBFBD><EFBFBD>ر<EFBFBD>־<EFBFBD><EFBFBD>״̬
* @arg true: <EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD>־Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
* @arg false:<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD>־Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
*/
__STATIC_INLINE bool std_tim_get_flag(TIM_t *timx, uint32_t flag)
{
return ((timx->SR &(flag)) == (flag));
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM<EFBFBD><EFBFBD>־
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param flag <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM<EFBFBD><EFBFBD>־
* @arg TIM_FLAG_UPDATE: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC1: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>1<EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC2: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>2<EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC3: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>3<EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC4: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>4<EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_TRIG: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC1OF: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>1<EFBFBD>ظ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC2OF: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>2<EFBFBD>ظ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC3OF: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>3<EFBFBD>ظ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
* @arg TIM_FLAG_CC4OF: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>4<EFBFBD>ظ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_clear_flag(TIM_t *timx, uint32_t flag)
{
timx->SR = (~(flag));
}
/**
* @brief ʹ<EFBFBD><EFBFBD>TIM<EFBFBD>Ƚ<EFBFBD>/ƥ<EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_ccx_channel_enable(TIM_t *timx, uint32_t channel_id)
{
timx->CCEN |= (TIM_CCEN_CC1E << (channel_id << 2));
}
/**
* @brief <EFBFBD><EFBFBD>ֹTIM<EFBFBD>Ƚ<EFBFBD>/ƥ<EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_ccx_channel_disable(TIM_t *timx, uint32_t channel_id)
{
timx->CCEN &= (~(TIM_CCEN_CC1E << (channel_id << 2)));
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM<EFBFBD><EFBFBD><EFBFBD>벶<EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @param input_capture_pol <EFBFBD><EFBFBD><EFBFBD>뼫<EFBFBD><EFBFBD>
* @arg TIM_INPUT_POL_RISING
* @arg TIM_INPUT_POL_FALLING
* @arg TIM_INPUT_POL_BOTH
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_input_pol(TIM_t *timx, uint32_t channel_id, uint32_t input_capture_pol)
{
MODIFY_REG(timx->CCEN, ((TIM_CCEN_CC1P | TIM_CCEN_CC1NP) << (channel_id << 2)), (input_capture_pol << (channel_id << 2)));
}
/**
* @brief <EFBFBD><EFBFBD>ȡTIM<EFBFBD><EFBFBD><EFBFBD>벶<EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval uint32_t <EFBFBD><EFBFBD><EFBFBD>뼫<EFBFBD><EFBFBD>
* @arg TIM_INPUT_POL_RISING
* @arg TIM_INPUT_POL_FALLING
* @arg TIM_INPUT_POL_BOTH
*/
__STATIC_INLINE uint32_t std_tim_get_input_pol(TIM_t *timx, uint32_t channel_id)
{
return (((timx->CCEN) >> (channel_id << 2)) & (TIM_CCEN_CC1P | TIM_CCEN_CC1NP));
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @param output_commpare_pol <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_OUTPUT_POL_HIGH
* @arg TIM_OUTPUT_POL_LOW
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_output_pol(TIM_t *timx, uint32_t channel_id, uint32_t output_commpare_pol)
{
MODIFY_REG(timx->CCEN, (TIM_CCEN_CC1P << (channel_id << 2)), (output_commpare_pol << (channel_id << 2)));
}
/**
* @brief <EFBFBD><EFBFBD>ȡTIMͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval uint32_t <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_OUTPUT_POL_HIGH
* @arg TIM_OUTPUT_POL_LOW
*/
__STATIC_INLINE uint32_t std_tim_get_output_pol(TIM_t *timx, uint32_t channel_id)
{
return (((timx->CCEN) >> (channel_id << 2)) & TIM_CCEN_CC1P);
}
/**
* @brief ʹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>OCxREF<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_channel_clear_ocxref_enable(TIM_t *timx, uint32_t channel_id)
{
uint32_t tmp_value = ((channel_id & 0x01) == 0)?0U:8U;
uint32_t shift_value = ((channel_id & 0x02) == 0)?0U:4U;
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CCM1) + shift_value);
/* ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>OCxREF */
*preg |= (TIM_CCM1_OC1CE << tmp_value);
}
/**
* @brief <EFBFBD><EFBFBD>ֹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>OCxREF<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_channel_clear_ocxref_disable(TIM_t *timx, uint32_t channel_id)
{
uint32_t tmp_value = ((channel_id & 0x01) == 0)?0U:8U;
uint32_t shift_value = ((channel_id & 0x02) == 0)?0U:4U;
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CCM1) + shift_value);
/* <20><>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>OCxREF */
*preg &= (~(TIM_CCM1_OC1CE << tmp_value));
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>벶<EFBFBD><EFBFBD>Ԥ<EFBFBD><EFBFBD>Ƶֵ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @param icxpsc_num <EFBFBD><EFBFBD><EFBFBD>벶<EFBFBD><EFBFBD>Ԥ<EFBFBD><EFBFBD>Ƶֵ
* @arg TIM_INPUT_CAPTURE_PSC_DIV1
* @arg TIM_INPUT_CAPTURE_PSC_DIV2
* @arg TIM_INPUT_CAPTURE_PSC_DIV4
* @arg TIM_INPUT_CAPTURE_PSC_DIV8
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_channel_icxpsc(TIM_t *timx, uint32_t channel_id, uint32_t icxpsc_num)
{
uint32_t tmp_value = ((channel_id & 0x01) == 0)?0U:8U;
uint32_t shift_value = ((channel_id & 0x02) == 0)?0U:4U;
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CCM1) + shift_value);
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>벶<EFBFBD><EBB2B6>Ԥ<EFBFBD><D4A4>Ƶ */
MODIFY_REG(*preg, (TIM_CCM1_IC1PSC << tmp_value), (icxpsc_num << tmp_value));
}
/**
* @brief <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>벶<EFBFBD><EFBFBD>Ԥ<EFBFBD><EFBFBD>Ƶֵ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval uint32_t <EFBFBD><EFBFBD><EFBFBD>벶<EFBFBD><EFBFBD>Ԥ<EFBFBD><EFBFBD>Ƶֵ
* @arg TIM_INPUT_CAPTURE_PSC_DIV1
* @arg TIM_INPUT_CAPTURE_PSC_DIV2
* @arg TIM_INPUT_CAPTURE_PSC_DIV4
* @arg TIM_INPUT_CAPTURE_PSC_DIV8
*/
__STATIC_INLINE uint32_t std_tim_get_channel_icxpsc(TIM_t *timx, uint32_t channel_id)
{
uint32_t tmp_value = ((channel_id & 0x01) == 0)?0U:8U;
uint32_t shift_value = ((channel_id & 0x02) == 0)?0U:4U;
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CCM1) + shift_value);
/* <20><>ȡ<EFBFBD><C8A1><EFBFBD>벶<EFBFBD><EBB2B6>Ԥ<EFBFBD><D4A4>Ƶ */
return ((*preg >> tmp_value) & TIM_CCM1_IC1PSC);
}
/**
* @brief ʹ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƚϵ<EFBFBD>Ԥװ<EFBFBD>ع<EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_preloadccx_channel_enable(TIM_t *timx, uint32_t channel_id)
{
uint32_t tmp_value = ((channel_id & 0x01) == 0)?0U:8U;
uint32_t shift_value = ((channel_id & 0x02) == 0)?0U:4U;
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CCM1) + shift_value);
/* ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>Ԥװ<D4A4>ع<EFBFBD><D8B9><EFBFBD> */
*preg |= (TIM_CCM1_OC1PE << tmp_value);
}
/**
* @brief <EFBFBD><EFBFBD>ֹTIMͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƚϵ<EFBFBD>Ԥװ<EFBFBD>ع<EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_preloadccx_channel_disable(TIM_t *timx, uint32_t channel_id)
{
uint32_t tmp_value = ((channel_id & 0x01) == 0)?0U:8U;
uint32_t shift_value = ((channel_id & 0x02) == 0)?0U:4U;
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CCM1) + shift_value);
/* ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>Ԥװ<D4A4>ع<EFBFBD><D8B9><EFBFBD> */
*preg &= (~(TIM_CCM1_OC1PE << tmp_value));
}
/**
* @brief ʹ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_fastmode_channel_enable(TIM_t *timx, uint32_t channel_id)
{
uint32_t tmp_value = ((channel_id & 0x01) == 0)?0U:8U;
uint32_t shift_value = ((channel_id & 0x02) == 0)?0U:4U;
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CCM1) + shift_value);
/* ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>Ԥװ<D4A4>ع<EFBFBD><D8B9><EFBFBD> */
*preg |= (TIM_CCM1_OC1FE << tmp_value);
}
/**
* @brief <EFBFBD><EFBFBD>ֹTIMͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_fastmode_channel_disable(TIM_t *timx, uint32_t channel_id)
{
uint32_t tmp_value = ((channel_id & 0x01) == 0)?0U:8U;
uint32_t shift_value = ((channel_id & 0x02) == 0)?0U:4U;
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CCM1) + shift_value);
/* <20><>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ */
*preg &= (~(TIM_CCM1_OC1FE << tmp_value));
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @param ocmode <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽѡ<EFBFBD><EFBFBD>
* @arg TIM_OUTPUT_MODE_FROZEN
* @arg TIM_OUTPUT_MODE_ACTIVE
* @arg TIM_OUTPUT_MODE_INACTIVE
* @arg TIM_OUTPUT_MODE_TOGGLE
* @arg TIM_OUTPUT_MODE_FORCED_INACTIVE
* @arg TIM_OUTPUT_MODE_FORCED_ACTIVE
* @arg TIM_OUTPUT_MODE_PWM1
* @arg TIM_OUTPUT_MODE_PWM2
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_ocmode(TIM_t *timx, uint32_t channel_id, uint32_t ocmode)
{
uint32_t tmp_value = ((channel_id & 0x01) == 0)?0U:8U;
uint32_t shift_value = ((channel_id & 0x02) == 0)?0U:4U;
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CCM1) + shift_value);
MODIFY_REG(*preg, ((TIM_CCM1_OC1M | TIM_CCM1_CC1S) << tmp_value), (ocmode << tmp_value));
}
/**
* @brief <EFBFBD><EFBFBD>ȡͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id ָ<EFBFBD><EFBFBD>TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @note <EFBFBD>ú<EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD>к󣬻Ὣͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @retval uint32_t <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽѡ<EFBFBD><EFBFBD>
* @arg TIM_OUTPUT_MODE_FROZEN
* @arg TIM_OUTPUT_MODE_ACTIVE
* @arg TIM_OUTPUT_MODE_INACTIVE
* @arg TIM_OUTPUT_MODE_TOGGLE
* @arg TIM_OUTPUT_MODE_FORCED_INACTIVE
* @arg TIM_OUTPUT_MODE_FORCED_ACTIVE
* @arg TIM_OUTPUT_MODE_PWM1
* @arg TIM_OUTPUT_MODE_PWM2
*/
__STATIC_INLINE uint32_t std_tim_get_ocmode(TIM_t *timx, uint32_t channel_id)
{
uint32_t tmp_value = ((channel_id & 0x01) == 0)?0U:8U;
uint32_t shift_value = ((channel_id & 0x02) == 0)?0U:4U;
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CCM1) + shift_value);
return ((*preg >> tmp_value) & TIM_CCM1_OC1M);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD>ò<EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>ȽϼĴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param ccx_value <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȽϼĴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
* @param channel_id TIM ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval std_status_t <EFBFBD><EFBFBD><EFBFBD><EFBFBD>APIִ<EFBFBD>н<EFBFBD><EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_ccx_value(TIM_t *timx, uint32_t channel_id, uint32_t ccx_value)
{
__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)(&timx->CC1) + (channel_id << 2));
MODIFY_REG(*pReg, TIM_CC1_CC1, ccx_value);
}
/**
* @brief <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>ȽϼĴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id TIM ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval uint32_t <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȽϼĴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
*/
__STATIC_INLINE uint32_t std_tim_get_ccx_value(TIM_t *timx, uint32_t channel_id)
{
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CC1) + (channel_id << 2));
return (*preg & TIM_CC1_CC1);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id TIM ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @param icmode <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽѡ<EFBFBD><EFBFBD>
* @arg TIM_INPUT_CAPTURE_SEL_DIRECTTI
* @arg TIM_INPUT_CAPTURE_SEL_INDIRECTTI
* @arg TIM_INPUT_CAPTURE_SEL_TRC
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_icmode(TIM_t *timx, uint32_t channel_id, uint32_t icmode)
{
uint32_t tmp_value = ((channel_id & 0x01) == 0)?0U:8U;
uint32_t shift_value = ((channel_id & 0x02) == 0)?0U:4U;
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CCM1) + shift_value);
MODIFY_REG(*preg, (TIM_CCM1_CC1S << tmp_value), (icmode << tmp_value));
}
/**
* @brief <EFBFBD><EFBFBD>ȡͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id TIM ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval uint32_t <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽѡ<EFBFBD><EFBFBD>
* @arg TIM_INPUT_CAPTURE_SEL_DIRECTTI
* @arg TIM_INPUT_CAPTURE_SEL_INDIRECTTI
* @arg TIM_INPUT_CAPTURE_SEL_TRC
*/
__STATIC_INLINE uint32_t std_tim_get_icmode(TIM_t *timx, uint32_t channel_id)
{
uint32_t tmp_value = ((channel_id & 0x01) == 0)?0U:8U;
uint32_t shift_value = ((channel_id & 0x02) == 0)?0U:4U;
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CCM1) + shift_value);
return ((*preg >> tmp_value) & TIM_CCM1_CC1S);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˲<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id TIM ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @param icfilter <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˲<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD>ķ<EFBFBD>ΧΪ:0x00~0x07
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_icfilter(TIM_t *timx, uint32_t channel_id, uint32_t icfilter)
{
uint32_t tmp_value = ((channel_id & 0x01) == 0)?0U:8U;
uint32_t shift_value = ((channel_id & 0x02) == 0)?0U:4U;
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CCM1) + shift_value);
MODIFY_REG(*preg, (TIM_CCM1_IC1F << tmp_value), ((icfilter << tmp_value) << 4U));
}
/**
* @brief <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˲<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id TIM ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval uint32_t <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˲<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD>ķ<EFBFBD>ΧΪ:0x00~0x07
*/
__STATIC_INLINE uint32_t std_tim_get_icfilter(TIM_t *timx, uint32_t channel_id)
{
uint32_t tmp_value = ((channel_id & 0x01) == 0)?0U:8U;
uint32_t shift_value = ((channel_id & 0x02) == 0)?0U:4U;
__IO uint32_t *preg = (__IO uint32_t *)((uint32_t)(&timx->CCM1) + shift_value);
return (((*preg >> tmp_value) & TIM_CCM1_IC1F) >> 4U);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD>ñ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʽ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param encoder_mode <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʽ
* @arg TIM_ENCODER_MODE_TI1
* @arg TIM_ENCODER_MODE_TI2
* @arg TIM_ENCODER_MODE_TI12
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_encode_mode_config(TIM_t *timx, uint32_t encoder_mode)
{
MODIFY_REG(timx->SMC, TIM_SMC_SM_SEL, encoder_mode);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD>TRIG_OUT<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param trigout_mode <EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_TRIG_OUT_RESET
* @arg TIM_TRIG_OUT_ENABLE
* @arg TIM_TRIG_OUT_UPDATE
* @arg TIM_TRIG_OUT_CC1
* @arg TIM_TRIG_OUT_OC1REF
* @arg TIM_TRIG_OUT_OC2REF
* @arg TIM_TRIG_OUT_OC3REF
* @arg TIM_TRIG_OUT_OC4REF
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_trigout_mode_config(TIM_t *timx, uint32_t trigout_mode)
{
MODIFY_REG(timx->CR2, TIM_CR2_MM_SEL, trigout_mode);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD>ô<EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param slave_mode <EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_SLAVE_MODE_DISABLE
* @arg TIM_SLAVE_MODE_RESET
* @arg TIM_SLAVE_MODE_GATED
* @arg TIM_SLAVE_MODE_TRIG
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_slave_mode_config(TIM_t *timx, uint32_t slave_mode)
{
MODIFY_REG(timx->SMC, TIM_SMC_SM_SEL, slave_mode);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD>ô<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param trig_source <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_TRIG_SOURCE_ITR0
* @arg TIM_TRIG_SOURCE_ITR1
* @arg TIM_TRIG_SOURCE_ITR2
* @arg TIM_TRIG_SOURCE_TI1F_ED
* @arg TIM_TRIG_SOURCE_TI1FP1
* @arg TIM_TRIG_SOURCE_TI2FP2
* @arg TIM_TRIG_SOURCE_ETRF
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_trig_source_config(TIM_t *timx, uint32_t trig_source)
{
MODIFY_REG(timx->SMC, TIM_SMC_TS, trig_source);
}
/**
* @brief ʹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD><EFBFBD>ģʽ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_master_mode_enable(TIM_t *timx)
{
timx->SMC |= TIM_SMC_MS_MOD;
}
/**
* @brief <EFBFBD><EFBFBD>ֹ<EFBFBD><EFBFBD>/<EFBFBD><EFBFBD>ģʽ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_master_mode_disable(TIM_t *timx)
{
timx->SMC &= (~TIM_SMC_MS_MOD);
}
/**
* @brief ETR<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param etr_pol ETR<EFBFBD><EFBFBD><EFBFBD>Բ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_ETR_POL_HIGH
* @arg TIM_ETR_POL_LOW
* @param etr_psc ETRԤ<EFBFBD><EFBFBD>Ƶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_ETR_PSC_DIV1
* @arg TIM_ETR_PSC_DIV2
* @arg TIM_ETR_PSC_DIV4
* @arg TIM_ETR_PSC_DIV8
* @param etr_filter ETR<EFBFBD>˲<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>壬<EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD>ΧΪ:0x00~0x07
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_etr_config(TIM_t *timx, uint32_t etr_pol, uint32_t etr_psc, uint32_t etr_filter)
{
MODIFY_REG(timx->SMC, TIM_SMC_ETP | TIM_SMC_ET_PRE | TIM_SMC_ETF, etr_pol | etr_psc | (etr_filter << TIM_SMC_ETF_POS));
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ETRԴ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param etr_source ETRԴѡ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM3<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ֮һ:
* @arg TIM_TIM3_ETR_GPIO: TIM3 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPIO
* @arg TIM_TIM3_ETR_COMP1: TIM3 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_TIM3_ETR_COMP2: TIM3 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_TIM3_ETR_LXTAL: TIM3 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>LXTAL
* @arg TIM_TIM3_ETR_HXTAL: TIM3 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>HXTAL
* @arg TIM_TIM3_ETR_MCO: TIM3 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>MCO
* @arg TIM_TIM3_ETR_RCL: TIM3 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>RCL
*
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM4<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ֮һ:
* @arg TIM_TIM4_ETR_GPIO: TIM4 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPIO
* @arg TIM_TIM4_ETR_COMP1: TIM4 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_TIM4_ETR_COMP2: TIM4 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM5<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ֮һ:
* @arg TIM_TIM5_ETR_GPIO: TIM5 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPIO
* @arg TIM_TIM5_ETR_COMP1: TIM5 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_TIM5_ETR_COMP2: TIM5 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_etr_source(TIM_t *timx, uint32_t etr_source)
{
MODIFY_REG(timx->AF1, TIM_AF1_ETR_SEL, etr_source);
}
/**
* @brief <EFBFBD><EFBFBD>ȡETRԴ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval uint32_t ETRԴѡ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM3<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ֮һ:
* @arg TIM_TIM3_ETR_GPIO: TIM3 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPIO
* @arg TIM_TIM3_ETR_COMP1: TIM3 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_TIM3_ETR_COMP2: TIM3 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_TIM3_ETR_LXTAL: TIM3 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>LXTAL
* @arg TIM_TIM3_ETR_HXTAL: TIM3 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>HXTAL
* @arg TIM_TIM3_ETR_MCO: TIM3 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>MCO
* @arg TIM_TIM3_ETR_RCL: TIM3 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>RCL
*
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM4<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ֮һ:
* @arg TIM_TIM4_ETR_GPIO: TIM4 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPIO
* @arg TIM_TIM4_ETR_COMP1: TIM4 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_TIM4_ETR_COMP2: TIM4 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM5<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ֮һ:
* @arg TIM_TIM5_ETR_GPIO: TIM5 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPIO
* @arg TIM_TIM5_ETR_COMP1: TIM5 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_TIM5_ETR_COMP2: TIM5 ETR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
__STATIC_INLINE uint32_t std_tim_get_etr_source(TIM_t *timx)
{
return (timx->AF1 & TIM_AF1_ETR_SEL);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM OCREF CLEAR<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param ocrefclr_source OCREF CLRԴѡ<EFBFBD><EFBFBD>
* @arg TIM_CLEAR_INPUT_SRC_ETR: OCREF CLR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>ETR
* @arg TIM_CLEAR_INPUT_SRC_COMP1: OCREF CLR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP1
* @arg TIM_CLEAR_INPUT_SRC_COMP2: OCREF CLR<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP2
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_ocrefclr_source_config(TIM_t *timx, uint32_t ocrefclr_source)
{
if(ocrefclr_source == TIM_CLEAR_INPUT_SRC_ETR)
{
timx->SMC |= TIM_SMC_OCCS;
}
else
{
timx->SMC &= (~TIM_SMC_OCCS);
MODIFY_REG(timx->CFG, TIM_CFG_OCREF_CLR, ocrefclr_source);
}
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD>ò<EFBFBD><EFBFBD><EFBFBD>/<EFBFBD>Ƚ<EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param gen_event <EFBFBD><EFBFBD><EFBFBD><EFBFBD>DMA<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>
* @arg TIM_GEN_DMA_REQ_CCX
* @arg TIM_GEN_DMA_REQ_UPDATE
* @note DMA Burstģʽ<EFBFBD>¸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_dma_request_gen_event_config(TIM_t *timx, uint32_t gen_event)
{
MODIFY_REG(timx->CR2, (TIM_CR2_CC_DMASEL), gen_event);
}
/**
* @brief ʹ<EFBFBD><EFBFBD>TI1<EFBFBD><EFBFBD>XOR<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_ti1xor_enable(TIM_t *timx)
{
timx->CR2 |= TIM_CR2_TI1_XOR_SEL;
}
/**
* @brief <EFBFBD><EFBFBD>ֹTI1<EFBFBD><EFBFBD>XOR<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_ti1xor_disable(TIM_t *timx)
{
timx->CR2 &= (~TIM_CR2_TI1_XOR_SEL);
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD>书<EFBFBD><EFBFBD>
* @param timx TIM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param ti_sel ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դѡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM3<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ֮һ:
* @arg TIM_TIM3_TI1_GPIO: TIM3 TI1<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPIO
* @arg TIM_TIM3_TI1_COMP1: TIM3 TI1<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_TIM3_TI2_GPIO: TIM3 TI2<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPIO
* @arg TIM_TIM3_TI2_COMP2: TIM3 TI2<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @arg TIM_TIM3_TI4_GPIO: TIM3 TI4<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPIO
* @arg TIM_TIM3_TI4_LXTAL: TIM3 TI4<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>LXTAL
* @arg TIM_TIM3_TI4_HXTAL: TIM3 TI4<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>HXTAL
* @arg TIM_TIM3_TI4_MCO: TIM3 TI4<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>MCO
* @arg TIM_TIM3_TI4_RCL: TIM3 TI4<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>RCL
*
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM4<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ֮һ:
* @arg TIM_TIM4_TI1_GPIO: TIM4 TI1<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPIO
* @arg TIM_TIM4_TI1_COMP1: TIM4 TI1<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_TIM4_TI2_GPIO: TIM4 TI2<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPIO
* @arg TIM_TIM4_TI2_COMP2: TIM4 TI2<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM5<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ֮һ:
* @arg TIM_TIM5_TI1_GPIO: TIM5 TI1<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPIO
* @arg TIM_TIM5_TI1_COMP1: TIM5 TI1<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @arg TIM_TIM5_TI2_GPIO: TIM5 TI2<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPIO
* @arg TIM_TIM5_TI2_COMP2: TIM5 TI2<EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>COMP2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param channel_id TIMͨ<EFBFBD><EFBFBD>
* @arg TIM_CHANNEL_1
* @arg TIM_CHANNEL_2
* @arg TIM_CHANNEL_3
* @arg TIM_CHANNEL_4
* @retval <EFBFBD><EFBFBD>
*/
__STATIC_INLINE void std_tim_set_channel_remap(TIM_t *timx, uint32_t ti_sel, uint32_t channel_id)
{
MODIFY_REG(timx->TISEL, (TIM_TISEL_TI1_SEL << (channel_id << 3)), ti_sel);
}
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><CABC>/ȥ<><C8A5>ʼ<EFBFBD><CABC> */
void std_tim_init(TIM_t *timx, std_tim_basic_init_t *tim_init_param);
void std_tim_deinit(TIM_t *timx);
void std_tim_struct_init(std_tim_basic_init_t *tim_init_struct);
/* <20><><EFBFBD>벶<EFBFBD><EBB2B6><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC> */
void std_tim_input_capture_init(TIM_t *timx, std_tim_input_capture_init_t *input_config, uint32_t channel_id);
void std_tim_input_capture_struct_init(std_tim_input_capture_init_t *input_init_struct);
/* <20><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD> */
void std_tim_output_compare_init(TIM_t *timx, std_tim_output_compare_init_t *output_config, uint32_t channel_id);
void std_tim_output_compare_struct_init(std_tim_output_compare_init_t *output_init_struct);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
/**
* @}
*/
/**
* @}
*/
#endif /* CIU32L051_STD_TIM_H */