/*** * @Author: mbw * @Date: 2024-08-21 15:50:54 * @LastEditors: mbw && 1600520629@qq.com * @LastEditTime: 2024-09-18 16:54:27 * @FilePath: \USART1_Interrupt - RT-Thread\RTOS\components\drivers\inc\serial.h * @Description: * @ * @Copyright (c) 2024 by ${git_name_email}, All Rights Reserved. */ /* * File : serial.h * This file is part of RT-Thread RTOS * COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * * Change Logs: * Date Author Notes * 2012-05-15 lgnq first version. * 2012-05-28 bernard change interfaces * 2013-02-20 bernard use RT_SERIAL_RB_BUFSZ to define * the size of ring buffer. */ #ifndef __SERIAL_H__ #define __SERIAL_H__ #include "rtthread.h" #define BAUD_RATE_2400 2400 #define BAUD_RATE_4800 4800 #define BAUD_RATE_9600 9600 #define BAUD_RATE_19200 19200 #define BAUD_RATE_38400 38400 #define BAUD_RATE_57600 57600 #define BAUD_RATE_115200 115200 #define BAUD_RATE_230400 230400 #define BAUD_RATE_460800 460800 #define BAUD_RATE_921600 921600 #define BAUD_RATE_2000000 2000000 #define BAUD_RATE_3000000 3000000 #define DATA_BITS_5 5 #define DATA_BITS_6 6 #define DATA_BITS_7 7 #define DATA_BITS_8 8 #define DATA_BITS_9 9 #define STOP_BITS_1 0 #define STOP_BITS_2 1 #define STOP_BITS_3 2 #define STOP_BITS_4 3 #ifdef _WIN32 #include #else #define PARITY_NONE 0 #define PARITY_ODD 1 #define PARITY_EVEN 2 #endif #define BIT_ORDER_LSB 0 #define BIT_ORDER_MSB 1 #define NRZ_NORMAL 0 /* Non Return to Zero : normal mode */ #define NRZ_INVERTED 1 /* Non Return to Zero : inverted mode */ #define RT_SERIAL_RB_BUFSZ 64 #define RT_SERIAL_FLOWCONTROL_NONE 0 struct serial_configure { rt_uint32_t baud_rate; rt_uint32_t data_bits :4; rt_uint32_t stop_bits :2; rt_uint32_t parity :2; rt_uint32_t bit_order :1; rt_uint32_t invert :1; rt_uint32_t bufsz :16; rt_uint32_t reserved :4; }; /* Default config for serial_configure structure */ #define RT_SERIAL_CONFIG_DEFAULT \ { \ USART_DIRECTION_SEND_RECEIVE, \ USART_OVERRUN_DISABLE, \ BAUD_RATE_115200, \ USART_WORDLENGTH_8BITS, \ USART_STOPBITS_1, \ USART_PARITY_NONE, \ USART_FLOWCONTROL_NONE, \ 0} /** * uart operators */ struct rt_uart_ops { // rt_err_t (*configure)(struct rt_serial_device *serial, struct serial_configure *cfg); // rt_err_t (*control)(struct rt_serial_device *serial, int cmd, void *arg); // int (*putc)(struct rt_serial_device *serial, char c); // int (*getc)(struct rt_serial_device *serial); // rt_size_t (*dma_transmit)(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction); }; /* ciu32 config class */ struct ciu32_uart_config { const char *name; USART_t *Instance; IRQn_Type irq_type; }; struct rt_serial_device { struct rt_device parent; const struct rt_uart_ops *ops; struct serial_configure config; void *serial_rx; void *serial_tx; }; typedef struct rt_serial_device rt_serial_t; /* ciu32 uart dirver class */ struct ciu32_uart { struct ciu32_uart_config *config; std_usart_init_t Init; struct rt_serial_device serial; }; #endif