/*
 * @Author       : stark1898y 1658608470@qq.com
 * @Date         : 2024-12-15 16:13:37
 * @LastEditors  : czq 860517298@qq.com
 * @LastEditTime : 2025-04-01 14:00:00
 * @FilePath     : \IOT_SCV_CH584M - \BSP\inc\bsp_iwdg.h
 * @Description  :
 *
 * Copyright (c) 2024 by yzy, All Rights Reserved.
 */

#ifndef __BSP_IWDG_H__
#define __BSP_IWDG_H__

#include "CONFIG.h"

#define  RB_RLR             0x0FFF                    // RW, watch-dog counter reload (write protect)
#define  RB_PR              0x7000                    // PR, prescale (write protect)
#define  RB_PVU             0x8000                    // RO, register update flag (write protect)
#define  RB_COUNT           0xFF0000                  // RO, watch-dog down counter
#define  RB_STOP_EN         0x20000000                // RW, watch-dog stop enable (write protect)
#define  RB_WR_PROTECT      0x40000000                // RO, write protect
#define  RB_IWDG_EN         0x80000000                // RO, watch-dog enable

void IWDG_Init(uint16_t ms);

#define  FEED_IWDG()   {R32_IWDG_KR=0xAAAA;}

void ShowRestartReason(void);

#endif // !__BSP_IWDG_H__




